{"success":true,"data":{"company":{"name":"Cognichip","domain":"cognichip","role_match_capture":false},"jobs":[{"uuid":"b060c6a9-09a1-47a2-aa9d-2daca2753b9b","title":"Formal Verification Engineer - AI  - Toronto, Canada","content":"**Job Title**\n\nFormal Verification Engineer - AI\n\n**About the Role**\n\n- We are looking for exceptional analytical minds to join our verification team. Our work centers on a hard and rewarding problem: mathematically proving that complex systems behave exactly as specified \u2014 no edge cases, no exceptions.\n- You might be an experienced formal methods practitioner, or you might come from pure mathematics, physics, or another rigorous quantitative discipline and be looking to apply your skills to concrete, high-impact engineering problems.\n- If you have a talent for precise reasoning, constructing airtight arguments, and learning new technical domains quickly, we will teach you the rest.\n\n**Key Responsibilities**\n\n- Develop and apply formal verification environments for complex systems.\n- Translate specifications and design documents into rigorous formal properties.\n- Perform property checking, model checking, and automated proof development; debug and root-cause counterexamples.\n- Improve verification coverage, methodology, and reusability across projects.\n- Develop scripts and utilities to support verification productivity.\n\n**Required Qualifications**\n\n- BS, MS, or Ph.D. in Computer Science, Mathematics, Physics, or another rigorous quantitative field.\n- Demonstrated strength in mathematical reasoning \u2014 through formal verification experience, research, competition mathematics, or comparable evidence of rigor.\n- Solid programming skills (e.g., Python, C++) and the drive to rapidly master new tools and domains.\n\n**Preferred Qualifications**\n\n- Hands-on experience with formal verification: model checking, property specification, or automated theorem proving.\n- Experience with interactive theorem provers (e.g., Coq, Lean, Isabelle, ACL2) or SMT solvers (e.g., Z3, CVC5).\n- Experience building verification tooling or contributing to open-source formal methods projects.\n- Background in logic, type theory, discrete mathematics, or mathematical physics.\n\n**What We Offer**\n\n- The chance to work on genuinely hard correctness problems where rigor matters.\n- Mentorship from experienced formal methods engineers and a structured ramp-up into the field.\n- A culture that values depth, precision, and first-principles thinking.","url":"https:\/\/www.linkedin.com\/jobs\/view\/4250859487","created_at":"2025-05-21T09:20:33.000000Z","department":"AI","job_type":null,"location":"\ud83c\udde8\ud83c\udde6 Toronto","description":"**Job Title**\n\nFormal Verification Engineer - AI\n\n**About the Role**\n\n- We are looking for exceptional analytical minds to join our verification team. Our work centers on a hard and rewarding problem: mathematically proving that complex systems behave exactly as specified \u2014 no edge cases, no exceptions.\n- You might be an experienced formal methods practitioner, or you might come from pure mathematics, physics, or another rigorous quantitative discipline and be looking to apply your skills to concrete, high-impact engineering problems.\n- If you have a talent for precise reasoning, constructing airtight arguments, and learning new technical domains quickly, we will teach you the rest.\n\n**Key Responsibilities**\n\n- Develop and apply formal verification environments for complex systems.\n- Translate specifications and design documents into rigorous formal properties.\n- Perform property checking, model checking, and automated proof development; debug and root-cause counterexamples.\n- Improve verification coverage, methodology, and reusability across projects.\n- Develop scripts and utilities to support verification productivity.\n\n**Required Qualifications**\n\n- BS, MS, or Ph.D. in Computer Science, Mathematics, Physics, or another rigorous quantitative field.\n- Demonstrated strength in mathematical reasoning \u2014 through formal verification experience, research, competition mathematics, or comparable evidence of rigor.\n- Solid programming skills (e.g., Python, C++) and the drive to rapidly master new tools and domains.\n\n**Preferred Qualifications**\n\n- Hands-on experience with formal verification: model checking, property specification, or automated theorem proving.\n- Experience with interactive theorem provers (e.g., Coq, Lean, Isabelle, ACL2) or SMT solvers (e.g., Z3, CVC5).\n- Experience building verification tooling or contributing to open-source formal methods projects.\n- Background in logic, type theory, discrete mathematics, or mathematical physics.\n\n**What We Offer**\n\n- The chance to work on genuinely hard correctness problems where rigor matters.\n- Mentorship from experienced formal methods engineers and a structured ramp-up into the field.\n- A culture that values depth, precision, and first-principles thinking.","categories":["Engineering","R&D"],"employment_type":null,"experience_level":null,"workplace_type":"Onsite","salary":null},{"uuid":"40867841-cd9e-4cb8-a5ce-ae33ba525147","title":"Director of Software Engineering, Canada","content":"**Job Title**\n\nDirector of Software, Canada\n\n**Job description**\n\n**About the Role**\n\n- We are seeking a software engineering leader (Director or experienced Sr. Manager ready to grow into this role) to scale our Toronto office. \n- This is a rare opportunity to establish the foundation of a high-impact, AI-driven SaaS company that is transforming semiconductor design. \n- You\u2019ll lead the growth of our Toronto site and scaling it into a high-performing engineering organization. \n- You will be responsible for technical oversight, delivery ownership, and culture building. \n- You are close enough to the technology to mentor engineers and participate in design discussions effectively and make informed technical decisions. \n- You\u2019ll work directly with the VP of Software and collaborate closely with core engineering and science leaders in Silicon Valley to ensure alignment across locations and shared ownership of Cognichip\u2019s technical and product vision. \n- This is a high-impact role for someone who thrives on both building teams and scaling organizations while highly technical in SaaS and AI domains. \n\n**Key Responsibilities**\n\n- Build & Scale the Toronto Office  \n  \u25cb Hire, onboard, and grow a team of 20-30 engineers across multiple disciplines (frontend, backend, ML\/AI, data, devtools).  \n  \u25cb Establish a strong, collaborative, and high-performance culture.  \n- Stay Technically Engaged  \n  \u25cb Maintain technical credibility while focusing primarily on organizational leadership.  \n  \u25cb Remain close to the stack to contribute in design reviews even if not coding daily  \n- Develop & Mentor Talent  \n  \u25cb Establish strong connections with universities and local talent market to find and recruit world-class talent  \n  \u25cb Coach and guide engineers, helping them grow into technical leaders.  \n  \u25cb Foster best practices around testing, modularity, documentation, and performance.  \n- Lead Delivery Across Value Streams  \n  \u25cb Own end-to-end delivery of product features, from planning through execution and adoption.  \n  \u25cb Partner with product, AI, and chip teams to define and execute roadmaps.  \n- Bridge Toronto & California  \n  \u25cb Ensure alignment across distributed teams and act as a communication bridge between offices.  \n  \u25cb Define engineering rituals and collaboration practices that support cross-site execution.  \n\n**Ideal Experience**\n\n- Proven leadership experience (Sr. Manager, Director, or equivalent) leading teams of 15+ cross-disciplinary engineers, with demonstrated ability to scale organizations.  \n- 10+ years of professional experience, including progression from hands-on engineer \u2192 tech lead \u2192 organizational leadership.  \n- Technical awareness and credibility in modern software stacks (cloud-native, AI\/ML, SaaS), even if not coding daily.  \n- Proven success in scaling teams and delivering complex software products in fast-moving environments.  \n- Strong track record in end-to-end product delivery: aligning strategy, execution, and outcomes.  \n- Excellent people leadership skills: hiring, mentoring, and developing engineers at all levels.  \n- Strong collaboration and communication skills; effective across distributed teams.  \n\n**Level**\n\n- We are targeting candidates who are currently at director level to this role.  \n- However, if you are currently a Manager or Sr. Manager with proven experience outlined in the \u201cIdeal Experience\u201d section and are ready to take the next step, we encourage you to apply.  \n- For the right candidate, this role can be scoped as Manager or Sr. Manager initially with a performance-based growth path as the Toronto site scales.","url":"https:\/\/www.linkedin.com\/jobs\/view\/4311676978","created_at":"2025-10-09T02:12:27.000000Z","department":"Software Eng","job_type":null,"location":"\ud83c\udde8\ud83c\udde6 Toronto","description":"**Job Title**\n\nDirector of Software, Canada\n\n**Job description**\n\n**About the Role**\n\n- We are seeking a software engineering leader (Director or experienced Sr. Manager ready to grow into this role) to scale our Toronto office. \n- This is a rare opportunity to establish the foundation of a high-impact, AI-driven SaaS company that is transforming semiconductor design. \n- You\u2019ll lead the growth of our Toronto site and scaling it into a high-performing engineering organization. \n- You will be responsible for technical oversight, delivery ownership, and culture building. \n- You are close enough to the technology to mentor engineers and participate in design discussions effectively and make informed technical decisions. \n- You\u2019ll work directly with the VP of Software and collaborate closely with core engineering and science leaders in Silicon Valley to ensure alignment across locations and shared ownership of Cognichip\u2019s technical and product vision. \n- This is a high-impact role for someone who thrives on both building teams and scaling organizations while highly technical in SaaS and AI domains. \n\n**Key Responsibilities**\n\n- Build & Scale the Toronto Office  \n  \u25cb Hire, onboard, and grow a team of 20-30 engineers across multiple disciplines (frontend, backend, ML\/AI, data, devtools).  \n  \u25cb Establish a strong, collaborative, and high-performance culture.  \n- Stay Technically Engaged  \n  \u25cb Maintain technical credibility while focusing primarily on organizational leadership.  \n  \u25cb Remain close to the stack to contribute in design reviews even if not coding daily  \n- Develop & Mentor Talent  \n  \u25cb Establish strong connections with universities and local talent market to find and recruit world-class talent  \n  \u25cb Coach and guide engineers, helping them grow into technical leaders.  \n  \u25cb Foster best practices around testing, modularity, documentation, and performance.  \n- Lead Delivery Across Value Streams  \n  \u25cb Own end-to-end delivery of product features, from planning through execution and adoption.  \n  \u25cb Partner with product, AI, and chip teams to define and execute roadmaps.  \n- Bridge Toronto & California  \n  \u25cb Ensure alignment across distributed teams and act as a communication bridge between offices.  \n  \u25cb Define engineering rituals and collaboration practices that support cross-site execution.  \n\n**Ideal Experience**\n\n- Proven leadership experience (Sr. Manager, Director, or equivalent) leading teams of 15+ cross-disciplinary engineers, with demonstrated ability to scale organizations.  \n- 10+ years of professional experience, including progression from hands-on engineer \u2192 tech lead \u2192 organizational leadership.  \n- Technical awareness and credibility in modern software stacks (cloud-native, AI\/ML, SaaS), even if not coding daily.  \n- Proven success in scaling teams and delivering complex software products in fast-moving environments.  \n- Strong track record in end-to-end product delivery: aligning strategy, execution, and outcomes.  \n- Excellent people leadership skills: hiring, mentoring, and developing engineers at all levels.  \n- Strong collaboration and communication skills; effective across distributed teams.  \n\n**Level**\n\n- We are targeting candidates who are currently at director level to this role.  \n- However, if you are currently a Manager or Sr. Manager with proven experience outlined in the \u201cIdeal Experience\u201d section and are ready to take the next step, we encourage you to apply.  \n- For the right candidate, this role can be scoped as Manager or Sr. Manager initially with a performance-based growth path as the Toronto site scales.","categories":[],"employment_type":null,"experience_level":null,"workplace_type":null,"salary":null},{"uuid":"feee761a-40c3-4714-8d7c-54acc4bd118c","title":"Senior Silicon ML Engineer","content":"**Job Title**\n\nSilicon ML Engineer III\n\n**Job description**\n\nThe Silicon ML Engineer (II\/III) develops AI-driven capabilities for silicon design and verification workflows by infusing hardware domain knowledge into modern AI and large-model systems. This role differs from an Applied Scientist or MLE role by requiring close integration between machine learning methods and semiconductor design processes, data, and constraints. The engineer will build domain-aware ML\/LLM and agent-based systems and translate research prototypes into production-grade tooling used in silicon design flows. Level will be determined based on experience, technical depth, and scope of ownership.\n\n**Key Responsibilities**\n\n- Design and implement AI-enabled silicon design and verification workflows with explicit incorporation of hardware domain knowledge and constraints\n- Encode domain structure, rules, and expert feedback into ML\/DL model pipelines, prompts, evaluation, and system logic\n- Prepare and curate silicon design and verification datasets with domain-aware labeling and quality controls\n- Docusign Envelope ID: D71FD0C3-D2E5-469B-BDF9-474E57D2338C\n- Build AI for hardware research prototypes and translate them into scalable, production-quality systems integrated with design flows\n- Collaborate directly with other chip design and verification engineers to ensure domain correctness and practical usability\n- Contribute to system architecture and integration with internal silicon design tools and workflows in LLM-based agentic systems\n- Produce technical documentation and communicate design decisions and tradeoffs to cross-functional stakeholders\n\n**Required Qualifications**\n\n- PhD in Computer Science, Electrical Engineering, or a relevant field with 3+ months of applied research or industry experience\n- Strong programming skills in Python (PyTorch or similar ML frameworks preferred)\n- Hands-on experience with machine learning \/ deep learning projects\n- Experience working with messy, real-world data and defining quality metrics\n- Demonstrated ability to work across abstraction layers - from research prototypes to production systems\n- Demonstrated exposure to hardware design, verification, or EDA workflows through coursework, research, or industry work\n- Proven track record of collaboration with with other deeply technical teams","url":null,"created_at":"2026-03-04T18:46:20.000000Z","department":"Hardware Eng","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nSilicon ML Engineer III\n\n**Job description**\n\nThe Silicon ML Engineer (II\/III) develops AI-driven capabilities for silicon design and verification workflows by infusing hardware domain knowledge into modern AI and large-model systems. This role differs from an Applied Scientist or MLE role by requiring close integration between machine learning methods and semiconductor design processes, data, and constraints. The engineer will build domain-aware ML\/LLM and agent-based systems and translate research prototypes into production-grade tooling used in silicon design flows. Level will be determined based on experience, technical depth, and scope of ownership.\n\n**Key Responsibilities**\n\n- Design and implement AI-enabled silicon design and verification workflows with explicit incorporation of hardware domain knowledge and constraints\n- Encode domain structure, rules, and expert feedback into ML\/DL model pipelines, prompts, evaluation, and system logic\n- Prepare and curate silicon design and verification datasets with domain-aware labeling and quality controls\n- Docusign Envelope ID: D71FD0C3-D2E5-469B-BDF9-474E57D2338C\n- Build AI for hardware research prototypes and translate them into scalable, production-quality systems integrated with design flows\n- Collaborate directly with other chip design and verification engineers to ensure domain correctness and practical usability\n- Contribute to system architecture and integration with internal silicon design tools and workflows in LLM-based agentic systems\n- Produce technical documentation and communicate design decisions and tradeoffs to cross-functional stakeholders\n\n**Required Qualifications**\n\n- PhD in Computer Science, Electrical Engineering, or a relevant field with 3+ months of applied research or industry experience\n- Strong programming skills in Python (PyTorch or similar ML frameworks preferred)\n- Hands-on experience with machine learning \/ deep learning projects\n- Experience working with messy, real-world data and defining quality metrics\n- Demonstrated ability to work across abstraction layers - from research prototypes to production systems\n- Demonstrated exposure to hardware design, verification, or EDA workflows through coursework, research, or industry work\n- Proven track record of collaboration with with other deeply technical teams","categories":["Engineering","R&D"],"employment_type":"FULL_TIME","experience_level":null,"workplace_type":null,"salary":{"min":150000,"max":180000,"currency":"USD","period":"YEARLY"}},{"uuid":"4aaff384-487d-464f-a15d-e701ffba42c5","title":"Staff - AI Solution Engineer","content":"**Job Title**\n\nStaff - AI Solution Architect\n\n**Job Description**\n\nAt Cognichip, we're not just building AI; we're enabling our customers to harness the power of AI to transform their silicon design workflows. As an AI Application Engineer, you'll be the crucial link between our groundbreaking Artificial Chip Intelligence (ACI) solutions and the design teams who will use them. You'll translate complex technical concepts into practical solutions, helping teams successfully adopt our solutions and unleash their creativity. If you thrive on solving technical challenges and empowering others to build the future, this is your stage.\n\n**Key Responsibilities**\n\n- Apply AI to real-world problems. Serve as the primary technical point of contact for customers, providing expert guidance and support to help them integrate Cognichip ACI\u00ae solutions into their design flows.\n- Bridge the gap. Collaborate closely with customer design teams, providing hands-on support and troubleshooting to ensure a seamless experience. You\u2019ll also act as the voice of the customer, relaying critical feedback and insights to our internal AI science and software teams.\n- Drive adoption and success. Develop and deliver technical presentations, demonstrations, and training sessions that showcase the value and capabilities of our solutions.\n- Diagnose and solve. Dive deep into customer-specific issues\u2014analyzing design flows, log files, and user interactions\u2014to diagnose problems, provide solutions, and help improve ournproducts and services.\n- Educate and inform. Create clear, concise technical documentation, application notes, and guides to empower our customers and accelerate their learning curve.\n\n**Required Qualifications**\n\n- Master's degree in Computer Science, Electrical Engineering, or a closely related field.\n- 7 - 10 years of experience in RTL design, verification, or a combination of both, with a passion for customer-facing roles.\n- Proficiency in Verilog\/SystemVerilog and scripting languages like Python.\n- Excellent written and verbal communication skills, with a strong ability to translate complex technical information into clear, actionable guidance.\n- A consultative, problem-solving mindset and a passion for helping others succeed.\n- Demonstrated knowledge of the chip design process, from RTL to physical design.\n- Experience with machine learning or deep learning concepts is a strong advantage.","url":null,"created_at":"2026-03-04T18:48:55.000000Z","department":"Product Marketing","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nStaff - AI Solution Architect\n\n**Job Description**\n\nAt Cognichip, we're not just building AI; we're enabling our customers to harness the power of AI to transform their silicon design workflows. As an AI Application Engineer, you'll be the crucial link between our groundbreaking Artificial Chip Intelligence (ACI) solutions and the design teams who will use them. You'll translate complex technical concepts into practical solutions, helping teams successfully adopt our solutions and unleash their creativity. If you thrive on solving technical challenges and empowering others to build the future, this is your stage.\n\n**Key Responsibilities**\n\n- Apply AI to real-world problems. Serve as the primary technical point of contact for customers, providing expert guidance and support to help them integrate Cognichip ACI\u00ae solutions into their design flows.\n- Bridge the gap. Collaborate closely with customer design teams, providing hands-on support and troubleshooting to ensure a seamless experience. You\u2019ll also act as the voice of the customer, relaying critical feedback and insights to our internal AI science and software teams.\n- Drive adoption and success. Develop and deliver technical presentations, demonstrations, and training sessions that showcase the value and capabilities of our solutions.\n- Diagnose and solve. Dive deep into customer-specific issues\u2014analyzing design flows, log files, and user interactions\u2014to diagnose problems, provide solutions, and help improve ournproducts and services.\n- Educate and inform. Create clear, concise technical documentation, application notes, and guides to empower our customers and accelerate their learning curve.\n\n**Required Qualifications**\n\n- Master's degree in Computer Science, Electrical Engineering, or a closely related field.\n- 7 - 10 years of experience in RTL design, verification, or a combination of both, with a passion for customer-facing roles.\n- Proficiency in Verilog\/SystemVerilog and scripting languages like Python.\n- Excellent written and verbal communication skills, with a strong ability to translate complex technical information into clear, actionable guidance.\n- A consultative, problem-solving mindset and a passion for helping others succeed.\n- Demonstrated knowledge of the chip design process, from RTL to physical design.\n- Experience with machine learning or deep learning concepts is a strong advantage.","categories":["Product & Marketing","Sales & Field"],"employment_type":"FULL_TIME","experience_level":null,"workplace_type":"Onsite","salary":null},{"uuid":"2f4edbf4-7e27-4724-bb2c-9af7204a6e70","title":"Sr. Staff - AI Solution Architect","content":"**Job Title**\n\nSr. Staff - AI Solution Architect\n\n**job description**\n\nAt Cognichip, we're not just building AI; we're enabling our customers to harness the power of AI to transform their silicon design workflows. As an AI Application Engineer, you'll be the crucial link between our groundbreaking Artificial Chip Intelligence (ACI) solutions and the design teams who will use them. You'll translate complex technical concepts into practical solutions, helping teams successfully adopt our solutions and unleash their creativity. If you thrive on solving technical challenges and empowering others to build the future, this is your stage.\n\n**Key Responsibilities**\n\n- Apply AI to real-world problems. Serve as the primary technical point of contact for customers, providing expert guidance and support to help them integrate Cognichip ACI\u00ae solutions into their design flows.\n- Bridge the gap. Collaborate closely with customer design teams, providing hands-on support and troubleshooting to ensure a seamless experience. You\u2019ll also act as the voice of the customer, relaying critical feedback and insights to our internal AI science and software teams.\n- Drive adoption and success. Develop and deliver technical presentations, demonstrations, and training sessions that showcase the value and capabilities of our solutions.\n- Diagnose and solve. Dive deep into customer-specific issues\u2014analyzing design flows, log files, and user interactions\u2014to diagnose problems, provide solutions, and help improve our products and services.\n- Educate and inform. Create clear, concise technical documentation, application notes, and guides to empower our customers and accelerate their learning curve.\n\n**Required Qualifications**\n\n- Master's degree in Computer Science, Electrical Engineering, or a closely related field.\n- 10 - 15 years of experience in RTL design, verification, or a combination of both, with a passion for customer-facing roles.\n- Proficiency in Verilog\/SystemVerilog and scripting languages like Python.\n- Excellent written and verbal communication skills, with a strong ability to translate complex technical information into clear, actionable guidance.\n- A consultative, problem-solving mindset and a passion for helping others succeed.\n- Demonstrated knowledge of the chip design process, from RTL to physical design.\n- Experience with machine learning or deep learning concepts is a strong advantage.","url":null,"created_at":"2026-03-04T18:53:49.000000Z","department":"Product Marketing","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nSr. Staff - AI Solution Architect\n\n**job description**\n\nAt Cognichip, we're not just building AI; we're enabling our customers to harness the power of AI to transform their silicon design workflows. As an AI Application Engineer, you'll be the crucial link between our groundbreaking Artificial Chip Intelligence (ACI) solutions and the design teams who will use them. You'll translate complex technical concepts into practical solutions, helping teams successfully adopt our solutions and unleash their creativity. If you thrive on solving technical challenges and empowering others to build the future, this is your stage.\n\n**Key Responsibilities**\n\n- Apply AI to real-world problems. Serve as the primary technical point of contact for customers, providing expert guidance and support to help them integrate Cognichip ACI\u00ae solutions into their design flows.\n- Bridge the gap. Collaborate closely with customer design teams, providing hands-on support and troubleshooting to ensure a seamless experience. You\u2019ll also act as the voice of the customer, relaying critical feedback and insights to our internal AI science and software teams.\n- Drive adoption and success. Develop and deliver technical presentations, demonstrations, and training sessions that showcase the value and capabilities of our solutions.\n- Diagnose and solve. Dive deep into customer-specific issues\u2014analyzing design flows, log files, and user interactions\u2014to diagnose problems, provide solutions, and help improve our products and services.\n- Educate and inform. Create clear, concise technical documentation, application notes, and guides to empower our customers and accelerate their learning curve.\n\n**Required Qualifications**\n\n- Master's degree in Computer Science, Electrical Engineering, or a closely related field.\n- 10 - 15 years of experience in RTL design, verification, or a combination of both, with a passion for customer-facing roles.\n- Proficiency in Verilog\/SystemVerilog and scripting languages like Python.\n- Excellent written and verbal communication skills, with a strong ability to translate complex technical information into clear, actionable guidance.\n- A consultative, problem-solving mindset and a passion for helping others succeed.\n- Demonstrated knowledge of the chip design process, from RTL to physical design.\n- Experience with machine learning or deep learning concepts is a strong advantage.","categories":["Product & Marketing","Sales & Field"],"employment_type":"FULL_TIME","experience_level":null,"workplace_type":null,"salary":null},{"uuid":"5f9670d0-7850-4843-89c5-39c8d0911c6f","title":"Staff Technical Marketing Manager","content":"**Job Title**\n\nStaff Technical Marketing Manager\n\n**job description**\n\nWe are looking for a seasoned professional at the intersection of AI, semiconductors, and technical communication. This is a dynamic, self-motivated leader who can translate complex engineering concepts into compelling value propositions. They are passionate about AI and its potential to drive innovation. They are a collaborative leader who thrives in cross-functional teams and unstructured environments. Communication comes naturally to them and engaging a technical audience is effortless.\n\n**Key Responsibilities**\n\n- Drive Strategic Messaging: Lead the definition and execution of technical marketing initiatives aligned with the company's vision. Conduct in-depth market research and competitive analysis to identify key differentiators and inform high-level positioning for our AI products.\n- Create & Deliver Technical Content: Drive the creation of deep-dive technical assets, including white papers, blog posts, webinars, and demos. Translate complex AI features into clear narratives that demonstrate technical superiority and solve specific customer pain points in the semiconductor space.\n- Cross-Functional Leadership: Work closely with product management, engineering, applied science, and sales teams to ensure messaging alignment. Act as a key point of contact and subject matter expert, influencing cross-functional teams to achieve go-to-market success.\n- Establish & Analyze Marketing Metrics: Define and rigorously track key performance indicators (KPIs) to measure the reach and impact of technical marketing campaigns. Conduct data analysis to identify areas for improvement and communicate performance insights to the CPO and other stakeholders.\n- Champion Technical Evangelism: Stay at the forefront of AI\/ML advancements, proactively identifying opportunities to showcase Cognichip\u2019s technical leadership. Represent the company at industry events, conferences, and within technical communities to build brand authority.\n\n**Required Qualifications**\n\n- Masters in Computer Science, Electrical Engineering, or a closely related field\n- 8+ years of experience in Technical Marketing, Product Marketing, or Applications Engineering within the semiconductor or EDA space\n- Strong Technical Acumen: A solid understanding of fundamental AI\/ML concepts, algorithms, and the data science lifecycle. You must be able to \"speak engineer\" and understand the nuances of silicon design workflows.\n- Proficiency in creating high-quality technical content and using data to measure the effectiveness of marketing funnels and engagement.\n- Proven track record in go-to-market for cloud-based software or complex hardware-software systems.\n- Deep understanding of the semiconductor ecosystem, development methodologies, and design workflows.\n- A passion for storytelling and communication; ability to distill complex technical ideas into clear narratives for both technical and non-technical audiences.","url":null,"created_at":"2026-03-04T20:44:44.000000Z","department":"Product Marketing","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nStaff Technical Marketing Manager\n\n**job description**\n\nWe are looking for a seasoned professional at the intersection of AI, semiconductors, and technical communication. This is a dynamic, self-motivated leader who can translate complex engineering concepts into compelling value propositions. They are passionate about AI and its potential to drive innovation. They are a collaborative leader who thrives in cross-functional teams and unstructured environments. Communication comes naturally to them and engaging a technical audience is effortless.\n\n**Key Responsibilities**\n\n- Drive Strategic Messaging: Lead the definition and execution of technical marketing initiatives aligned with the company's vision. Conduct in-depth market research and competitive analysis to identify key differentiators and inform high-level positioning for our AI products.\n- Create & Deliver Technical Content: Drive the creation of deep-dive technical assets, including white papers, blog posts, webinars, and demos. Translate complex AI features into clear narratives that demonstrate technical superiority and solve specific customer pain points in the semiconductor space.\n- Cross-Functional Leadership: Work closely with product management, engineering, applied science, and sales teams to ensure messaging alignment. Act as a key point of contact and subject matter expert, influencing cross-functional teams to achieve go-to-market success.\n- Establish & Analyze Marketing Metrics: Define and rigorously track key performance indicators (KPIs) to measure the reach and impact of technical marketing campaigns. Conduct data analysis to identify areas for improvement and communicate performance insights to the CPO and other stakeholders.\n- Champion Technical Evangelism: Stay at the forefront of AI\/ML advancements, proactively identifying opportunities to showcase Cognichip\u2019s technical leadership. Represent the company at industry events, conferences, and within technical communities to build brand authority.\n\n**Required Qualifications**\n\n- Masters in Computer Science, Electrical Engineering, or a closely related field\n- 8+ years of experience in Technical Marketing, Product Marketing, or Applications Engineering within the semiconductor or EDA space\n- Strong Technical Acumen: A solid understanding of fundamental AI\/ML concepts, algorithms, and the data science lifecycle. You must be able to \"speak engineer\" and understand the nuances of silicon design workflows.\n- Proficiency in creating high-quality technical content and using data to measure the effectiveness of marketing funnels and engagement.\n- Proven track record in go-to-market for cloud-based software or complex hardware-software systems.\n- Deep understanding of the semiconductor ecosystem, development methodologies, and design workflows.\n- A passion for storytelling and communication; ability to distill complex technical ideas into clear narratives for both technical and non-technical audiences.","categories":["Product & Marketing"],"employment_type":"FULL_TIME","experience_level":null,"workplace_type":null,"salary":{"min":150000,"max":250000,"currency":"USD","period":"YEARLY"}},{"uuid":"ae2bdd7c-6574-4f4a-be9d-7cf3e0d38c52","title":"Staff Software Engineer - Agentic AI Systems","content":"**Job Title**\n\nStaff Software Engineer - Agentic AI Systems\n\n**Job Description**\n\n**About the Role**\n\n- We are seeking a Staff Agentic AI Engineer to lead the architecture, implementation, and production deployment of advanced agentic AI systems.  \n- In this role, you will serve as a technical authority for multi-agent systems across Cognichip, driving long-horizon autonomous workflows that integrate proprietary models, semiconductor design tools, and cloud infrastructure.  \n- You will design systems that reason across multiple steps, manage memory and knowledge grounding, and operate reliably in production over extended periods.  \n- This is a senior individual contributor leadership role.  \n- You will define architectural patterns, raise engineering standards, mentor other engineers, and partner closely with Applied AI, Product Engineering, and Platform teams to translate cutting-edge research into scalable enterprise solutions.  \n- Success in this role is measured not by prototypes, but by robust, production-grade agentic systems shipped to customers.\n\n**Key Responsibilities**\n\n**Technical Leadership & Architecture**\n\n- Own the end-to-end architecture of agentic AI workflows, including reasoning pipelines, memory systems, RAG, evaluation frameworks, and orchestration patterns.  \n- Define best practices for supervisor\/sub-agent coordination, fault tolerance, long-horizon reasoning, and system robustness.  \n- Serve as Cognichip\u2019s internal expert on agentic AI system design and production deployment.\n\n**Build & Operate Agentic Systems**\n\n- Design and implement multi-step autonomous agents with advanced memory, Retrieval-Augmented Generation (RAG), and integrations to tools, APIs, and enterprise data sources.  \n- Deliver production-grade workflows deployed on cloud platforms (AWS preferred), with strong observability, monitoring, and reliability guarantees.  \n- Drive continuous improvement of agent quality, cost efficiency, and performance in real customer environments.\n\n**Evaluation & Optimization**\n\n- Define and implement comprehensive evaluation pipelines for agentic systems:  \n- Task success \/ failure classification  \n- Grounding accuracy  \n- Reasoning robustness  \n- Tool-use reliability  \n- Long-horizon completion rates  \n- Establish regression testing and benchmarking strategies using frameworks such as LangSmith or custom evaluation infrastructure.  \n- Balance automated evaluation with human-in-the-loop feedback for complex workflows.\n\n**Cross-Functional Collaboration**\n\n- Partner with Applied AI researchers to productionize new capabilities.  \n- Work with backend\/platform engineers to integrate agents with cloud infrastructure and enterprise systems.  \n- Collaborate with product managers to translate semiconductor workflows into agent-driven user experiences.\n\n**Organizational Impact**\n\n- Set technical direction for agentic AI systems across teams.  \n- Mentor senior and mid-level engineers.  \n- Raise engineering standards around agent architecture, evaluation, and production readiness.\n\n**Required Qualifications**\n\n- Bachelor\u2019s or Master\u2019s degree in Computer Science, Software Engineering, or related field.  \n- 8\u201312+ years of professional software engineering experience.  \n- 3+ years building and deploying production-grade agentic AI systems.  \n- Deep hands-on experience with:  \n- Multi-agent orchestration frameworks (LangGraph, LangChain, LangSmith, or equivalents)  \n- RAG pipelines and memory systems  \n- Agent evaluation methodologies  \n- Strong proficiency in Python and backend cloud services (AWS preferred).  \n- Proven track record delivering complex AI systems into production.\n\n**Preferred Qualifications**\n\n- Contributions to open-source AI projects or frameworks.  \n- Experience with multi-agent orchestration patterns at scale.  \n- Knowledge of reinforcement learning, planning algorithms, or autonomous reasoning.  \n- Track record of deploying agentic AI systems in production at scale.\n\n**What We Offer**\n\n- The chance to work on state-of-the-art AI systems that push the boundaries of autonomy and reasoning.  \n- A collaborative environment where engineering meets research.  \n- Competitive compensation and equity in a fast-growing AI startup.  \n- A culture that values ownership, curiosity, and technical excellence.","url":null,"created_at":"2026-03-06T18:26:37.000000Z","department":"Software Eng","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nStaff Software Engineer - Agentic AI Systems\n\n**Job Description**\n\n**About the Role**\n\n- We are seeking a Staff Agentic AI Engineer to lead the architecture, implementation, and production deployment of advanced agentic AI systems.  \n- In this role, you will serve as a technical authority for multi-agent systems across Cognichip, driving long-horizon autonomous workflows that integrate proprietary models, semiconductor design tools, and cloud infrastructure.  \n- You will design systems that reason across multiple steps, manage memory and knowledge grounding, and operate reliably in production over extended periods.  \n- This is a senior individual contributor leadership role.  \n- You will define architectural patterns, raise engineering standards, mentor other engineers, and partner closely with Applied AI, Product Engineering, and Platform teams to translate cutting-edge research into scalable enterprise solutions.  \n- Success in this role is measured not by prototypes, but by robust, production-grade agentic systems shipped to customers.\n\n**Key Responsibilities**\n\n**Technical Leadership & Architecture**\n\n- Own the end-to-end architecture of agentic AI workflows, including reasoning pipelines, memory systems, RAG, evaluation frameworks, and orchestration patterns.  \n- Define best practices for supervisor\/sub-agent coordination, fault tolerance, long-horizon reasoning, and system robustness.  \n- Serve as Cognichip\u2019s internal expert on agentic AI system design and production deployment.\n\n**Build & Operate Agentic Systems**\n\n- Design and implement multi-step autonomous agents with advanced memory, Retrieval-Augmented Generation (RAG), and integrations to tools, APIs, and enterprise data sources.  \n- Deliver production-grade workflows deployed on cloud platforms (AWS preferred), with strong observability, monitoring, and reliability guarantees.  \n- Drive continuous improvement of agent quality, cost efficiency, and performance in real customer environments.\n\n**Evaluation & Optimization**\n\n- Define and implement comprehensive evaluation pipelines for agentic systems:  \n- Task success \/ failure classification  \n- Grounding accuracy  \n- Reasoning robustness  \n- Tool-use reliability  \n- Long-horizon completion rates  \n- Establish regression testing and benchmarking strategies using frameworks such as LangSmith or custom evaluation infrastructure.  \n- Balance automated evaluation with human-in-the-loop feedback for complex workflows.\n\n**Cross-Functional Collaboration**\n\n- Partner with Applied AI researchers to productionize new capabilities.  \n- Work with backend\/platform engineers to integrate agents with cloud infrastructure and enterprise systems.  \n- Collaborate with product managers to translate semiconductor workflows into agent-driven user experiences.\n\n**Organizational Impact**\n\n- Set technical direction for agentic AI systems across teams.  \n- Mentor senior and mid-level engineers.  \n- Raise engineering standards around agent architecture, evaluation, and production readiness.\n\n**Required Qualifications**\n\n- Bachelor\u2019s or Master\u2019s degree in Computer Science, Software Engineering, or related field.  \n- 8\u201312+ years of professional software engineering experience.  \n- 3+ years building and deploying production-grade agentic AI systems.  \n- Deep hands-on experience with:  \n- Multi-agent orchestration frameworks (LangGraph, LangChain, LangSmith, or equivalents)  \n- RAG pipelines and memory systems  \n- Agent evaluation methodologies  \n- Strong proficiency in Python and backend cloud services (AWS preferred).  \n- Proven track record delivering complex AI systems into production.\n\n**Preferred Qualifications**\n\n- Contributions to open-source AI projects or frameworks.  \n- Experience with multi-agent orchestration patterns at scale.  \n- Knowledge of reinforcement learning, planning algorithms, or autonomous reasoning.  \n- Track record of deploying agentic AI systems in production at scale.\n\n**What We Offer**\n\n- The chance to work on state-of-the-art AI systems that push the boundaries of autonomy and reasoning.  \n- A collaborative environment where engineering meets research.  \n- Competitive compensation and equity in a fast-growing AI startup.  \n- A culture that values ownership, curiosity, and technical excellence.","categories":["Engineering"],"employment_type":"FULL_TIME","experience_level":null,"workplace_type":"Onsite","salary":{"min":150000,"max":250000,"currency":"USD","period":"YEARLY"}},{"uuid":"4f36d0ba-c8a8-4b52-93a8-7964b309ecec","title":"Senior Silicon Engineer","content":"**Job Title**\n\nSenior Silicon Engineer\n\n**Job description**\n\n**About the Job**\n\nAt Cognichip, we are building the next-generation enterprise product suite to empower semiconductor design engineers to achieve a 10x productivity boost using proprietary AI\/ML models and modern cloud technologies. We are seeking an experienced logic design or verification engineer to join a growing Silicon AI team to develop AI-driven capabilities for silicon design and verification workflows and synthetic data engineering. You will be part of a team building an AI engine capable of exhaustively designing and verifying hardware IP architecture and microarchitecture, as well as integrating it into larger SoCs. We are looking for highly talented, passionate, and versatile engineers who can push hardware to the highest performance and quality standards.\n\n**Core Responsibilities**\n\n- Technical ownership of logic design and validation of various functional blocks of CPU, IPs, and\/or SoC\n- Document microarchitecture specifications and test plans; drive reviews of AI-generated specs and test plans\n- Design in-house hardware IPs, including logic synthesis, timing closure, power optimization, area reduction, and performance targets\n- Develop validation content including UVM and SystemVerilog testbenches, directed and constrained random tests, SystemVerilog assertions, and functional coverage\n- Apply agentic workflows to generate synthetic data for logic design and verification\n\n**Required Qualifications**\n\n- BS in Electrical Engineering or a related technical field\n- 5+ years of experience in CPU, graphics, or SoC design and validation\n- Strong knowledge of CPU, IP, and SoC architecture\n- Experience with logic design, synthesis, timing closure, low-power design, multi-clock domains, and area optimization\n- Knowledge of verification methodologies (test plan development, test generation\/debug, assertion-based verification, coverage analysis and closure)\n- Experience with SystemVerilog and UVM\n- Experience with C\/C++ and assembly\n- Experience with Python or other scripting languages\n- Strong cross-functional communication skills across multidisciplinary teams\n- Business-fluent English\n\n**Nice to Have:**\n\n- Experience with emulation and gate-level verification\n- Experience with backend flow and physical design\n\n**What We Offer**\n\n- Work on foundational, unsolved problems at the intersection of AI and hardware\n- Real ownership with direct impact on core product capabilities\n- Collaborate with a high-caliber team across AI, cloud, and semiconductor design\n- A culture of innovation, precision, and impact\n- Competitive compensation package, including equity participation","url":"https:\/\/www.linkedin.com\/jobs\/view\/4381053704\/","created_at":"2026-03-18T16:27:37.000000Z","department":"Hardware Eng","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nSenior Silicon Engineer\n\n**Job description**\n\n**About the Job**\n\nAt Cognichip, we are building the next-generation enterprise product suite to empower semiconductor design engineers to achieve a 10x productivity boost using proprietary AI\/ML models and modern cloud technologies. We are seeking an experienced logic design or verification engineer to join a growing Silicon AI team to develop AI-driven capabilities for silicon design and verification workflows and synthetic data engineering. You will be part of a team building an AI engine capable of exhaustively designing and verifying hardware IP architecture and microarchitecture, as well as integrating it into larger SoCs. We are looking for highly talented, passionate, and versatile engineers who can push hardware to the highest performance and quality standards.\n\n**Core Responsibilities**\n\n- Technical ownership of logic design and validation of various functional blocks of CPU, IPs, and\/or SoC\n- Document microarchitecture specifications and test plans; drive reviews of AI-generated specs and test plans\n- Design in-house hardware IPs, including logic synthesis, timing closure, power optimization, area reduction, and performance targets\n- Develop validation content including UVM and SystemVerilog testbenches, directed and constrained random tests, SystemVerilog assertions, and functional coverage\n- Apply agentic workflows to generate synthetic data for logic design and verification\n\n**Required Qualifications**\n\n- BS in Electrical Engineering or a related technical field\n- 5+ years of experience in CPU, graphics, or SoC design and validation\n- Strong knowledge of CPU, IP, and SoC architecture\n- Experience with logic design, synthesis, timing closure, low-power design, multi-clock domains, and area optimization\n- Knowledge of verification methodologies (test plan development, test generation\/debug, assertion-based verification, coverage analysis and closure)\n- Experience with SystemVerilog and UVM\n- Experience with C\/C++ and assembly\n- Experience with Python or other scripting languages\n- Strong cross-functional communication skills across multidisciplinary teams\n- Business-fluent English\n\n**Nice to Have:**\n\n- Experience with emulation and gate-level verification\n- Experience with backend flow and physical design\n\n**What We Offer**\n\n- Work on foundational, unsolved problems at the intersection of AI and hardware\n- Real ownership with direct impact on core product capabilities\n- Collaborate with a high-caliber team across AI, cloud, and semiconductor design\n- A culture of innovation, precision, and impact\n- Competitive compensation package, including equity participation","categories":["Engineering","R&D"],"employment_type":null,"experience_level":null,"workplace_type":null,"salary":null},{"uuid":"02bb3743-2702-40b9-ac15-3321295eae4c","title":"Staff Silicon Engineer","content":"**Job Title**\n\nStaff Silicon Engineer\n\n**About Cognichip**\n\n- At Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips.\n- Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world's most complex engineering disciplines.\n\n**About the Role**\n\n- We are seeking a Staff Silicon Engineer who can combine strong software engineering, applied AI\/ML, and semiconductor-domain understanding to build production-grade tools for chip design and verification.\n- In this role, you will help turn advanced research ideas into practical workflows used by engineers designing real silicon.\n- This work matters because chip design is becoming too complex for traditional workflows alone, and AI-native engineering systems can meaningfully change the speed, quality, and scale of semiconductor development.\n\n**Key Responsibilities**\n\n- Bridge Hardware and Software: Translate deep semiconductor domain expertise into robust software requirements and implementations.\n- Develop Agentic Data Pipelines: Architect and implement agentic workflows specifically designed to generate synthetic or augmented RTL and UVM code, creating essential datasets for training and fine-tuning advanced AI models.\n- Agentic Workflow Optimization: Fine-tune and optimize agentic workflow for domain-specific engineering tasks such as RTL generation, verification planning, and bug triage.\n- Infrastructure Development: Build and maintain high-performance simulation and testing infrastructure to validate AI-generated hardware designs.\n- Technical Leadership: Provide mentorship to junior engineers and lead cross-functional projects involving AI researchers and hardware architects.\n\n**Required Qualifications**\n\n- Experience: 8+ years of experience in silicon design, verification, or hardware-focused software development.\n- Semiconductor Domain: Deep understanding of the ASIC\/FPGA design lifecycle in at least two of the three phases: RTL design (Verilog\/SystemVerilog), UVM-based verification, and physical design flows.\n- EDA Tools: Experience with, and being a power user of, commercial EDA tools from major vendors (Cadence, Synopsys, Mentor\/Siemens).\n- Software Proficiency: Strong programming skills in Python, C++, or similar languages, with experience in building scalable software systems.\n- AI\/ML Knowledge: Practical experience with LLMs, prompt engineering, or machine learning frameworks (PyTorch\/TensorFlow) applied to technical domains.\n- Education: MS or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.\n\n**Preferred Qualifications**\n\n- Experience with LangSmith and LangGraph to build Agentic workflow..\n- Background in computer architecture, specifically for AI accelerators or high-performance computing.\n- Contributions to open-source hardware or AI projects.\n\n**What It's Like Here**\n\n- We\u2019re a fast-moving AI startup with a collaborative, high-trust culture.\n- We value technical excellence, ownership, and the freedom to experiment.\n- Our best work happens when our builders and innovators work closely together to turn ambitious ideas into category defining products.\n- We operate on a hybrid schedule with four days in office, one day remote.\n- If you\u2019re excited to build cutting edge tools that empower semiconductor engineers and reshape how chips are designed, you\u2019ll feel right at home.","url":"https:\/\/www.linkedin.com\/jobs\/view\/4390750468\/?trk=mcm","created_at":"2026-03-26T17:09:58.000000Z","department":"Hardware Eng","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nStaff Silicon Engineer\n\n**About Cognichip**\n\n- At Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips.\n- Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world's most complex engineering disciplines.\n\n**About the Role**\n\n- We are seeking a Staff Silicon Engineer who can combine strong software engineering, applied AI\/ML, and semiconductor-domain understanding to build production-grade tools for chip design and verification.\n- In this role, you will help turn advanced research ideas into practical workflows used by engineers designing real silicon.\n- This work matters because chip design is becoming too complex for traditional workflows alone, and AI-native engineering systems can meaningfully change the speed, quality, and scale of semiconductor development.\n\n**Key Responsibilities**\n\n- Bridge Hardware and Software: Translate deep semiconductor domain expertise into robust software requirements and implementations.\n- Develop Agentic Data Pipelines: Architect and implement agentic workflows specifically designed to generate synthetic or augmented RTL and UVM code, creating essential datasets for training and fine-tuning advanced AI models.\n- Agentic Workflow Optimization: Fine-tune and optimize agentic workflow for domain-specific engineering tasks such as RTL generation, verification planning, and bug triage.\n- Infrastructure Development: Build and maintain high-performance simulation and testing infrastructure to validate AI-generated hardware designs.\n- Technical Leadership: Provide mentorship to junior engineers and lead cross-functional projects involving AI researchers and hardware architects.\n\n**Required Qualifications**\n\n- Experience: 8+ years of experience in silicon design, verification, or hardware-focused software development.\n- Semiconductor Domain: Deep understanding of the ASIC\/FPGA design lifecycle in at least two of the three phases: RTL design (Verilog\/SystemVerilog), UVM-based verification, and physical design flows.\n- EDA Tools: Experience with, and being a power user of, commercial EDA tools from major vendors (Cadence, Synopsys, Mentor\/Siemens).\n- Software Proficiency: Strong programming skills in Python, C++, or similar languages, with experience in building scalable software systems.\n- AI\/ML Knowledge: Practical experience with LLMs, prompt engineering, or machine learning frameworks (PyTorch\/TensorFlow) applied to technical domains.\n- Education: MS or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.\n\n**Preferred Qualifications**\n\n- Experience with LangSmith and LangGraph to build Agentic workflow..\n- Background in computer architecture, specifically for AI accelerators or high-performance computing.\n- Contributions to open-source hardware or AI projects.\n\n**What It's Like Here**\n\n- We\u2019re a fast-moving AI startup with a collaborative, high-trust culture.\n- We value technical excellence, ownership, and the freedom to experiment.\n- Our best work happens when our builders and innovators work closely together to turn ambitious ideas into category defining products.\n- We operate on a hybrid schedule with four days in office, one day remote.\n- If you\u2019re excited to build cutting edge tools that empower semiconductor engineers and reshape how chips are designed, you\u2019ll feel right at home.","categories":["Engineering","R&D"],"employment_type":"FULL_TIME","experience_level":null,"workplace_type":"Onsite","salary":{"min":150000,"max":250000,"currency":"USD","period":"YEARLY"}},{"uuid":"572e08a7-02e6-4f9d-9bfe-390f54ee7e32","title":"Vice President of Sales","content":"**Job Title**\n\nVice President of Sales\n\n**Job Description**\n\n**Role Overview**  \nCognichip is seeking a strategic and execution-oriented Vice President of worldwide sales to lead and build our global commercial function. This executive will define and drive our go-to-market sales strategy, lead enterprise customer acquisition, and establish a scalable revenue engine within the semiconductor and AI ecosystem. This is a high-impact leadership role reporting directly to the CEO. The VP of Sales will be responsible for closing complex enterprise deals, refining commercial strategy, and building the foundation for long-term, sustainable growth. We are looking for a technically fluent commercial leader who understands semiconductor and AI markets, can engage engineering-driven customers, and is comfortable operating in a fast-moving, deep-tech environment.\n\n**Key Responsibilities**\n\n- Revenue Leadership  \n- Define and execute Cognichip\u2019s enterprise sales strategy.  \n- Build and manage a high-quality pipeline of strategic semiconductor and AI hardware customers.  \n- Establish pricing frameworks, commercial structures, and enterprise sales processes.  \n- Own forecasting discipline and revenue visibility.\n\n- Enterprise Sales Execution  \n- Lead direct engagement with semiconductor companies, fabless chip designers, AI hardware firms, and strategic enterprise accounts.  \n- Close complex, multi-stakeholder enterprise deals.  \n- Develop trusted relationships with CTOs, VPs of Engineering, Heads of Silicon, and executive stakeholders.  \n- Navigate long technical sales cycles with credibility and precision.\n\n- Commercial Infrastructure & Team Development  \n- Establish CRM rigor, pipeline hygiene, and performance metrics.  \n- Design scalable sales processes and reporting systems.  \n- Over time, hire, mentor, and develop a high-performing commercial team.  \n- Implement KPIs aligned with company objectives.\n\n- Cross-Functional Leadership  \n- Partner closely with Product and Engineering to ensure customer insights inform product roadmap.  \n- Translate technical capabilities into clear business value for customers.  \n- Contribute to overall company strategy as a member of the executive leadership team.\n\n- Market Representation\n\n**Qualifications**\n\n- Extensive experience selling complex, technical solutions in semiconductor, hardware, AI infrastructure, EDA, or enterprise deep-tech environments.  \n- Proven track record of closing high-value enterprise deals.  \n- Experience engaging engineering-led organizations and technical decision-makers.  \n- Strong executive presence and negotiation skills.  \n- Experience operating in startup or high-growth environments.  \n- Builder mindset with both strategic vision and hands-on execution capability.\n\n**Preferred Experience**\n\n- Deep familiarity with semiconductor design flows, chip architecture, or hardware ecosystems.  \n- Established industry relationships within semiconductor or AI hardware markets.  \n- Experience building or scaling enterprise sales organizations.","url":null,"created_at":"2026-04-08T19:28:00.000000Z","department":"G & A","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nVice President of Sales\n\n**Job Description**\n\n**Role Overview**  \nCognichip is seeking a strategic and execution-oriented Vice President of worldwide sales to lead and build our global commercial function. This executive will define and drive our go-to-market sales strategy, lead enterprise customer acquisition, and establish a scalable revenue engine within the semiconductor and AI ecosystem. This is a high-impact leadership role reporting directly to the CEO. The VP of Sales will be responsible for closing complex enterprise deals, refining commercial strategy, and building the foundation for long-term, sustainable growth. We are looking for a technically fluent commercial leader who understands semiconductor and AI markets, can engage engineering-driven customers, and is comfortable operating in a fast-moving, deep-tech environment.\n\n**Key Responsibilities**\n\n- Revenue Leadership  \n- Define and execute Cognichip\u2019s enterprise sales strategy.  \n- Build and manage a high-quality pipeline of strategic semiconductor and AI hardware customers.  \n- Establish pricing frameworks, commercial structures, and enterprise sales processes.  \n- Own forecasting discipline and revenue visibility.\n\n- Enterprise Sales Execution  \n- Lead direct engagement with semiconductor companies, fabless chip designers, AI hardware firms, and strategic enterprise accounts.  \n- Close complex, multi-stakeholder enterprise deals.  \n- Develop trusted relationships with CTOs, VPs of Engineering, Heads of Silicon, and executive stakeholders.  \n- Navigate long technical sales cycles with credibility and precision.\n\n- Commercial Infrastructure & Team Development  \n- Establish CRM rigor, pipeline hygiene, and performance metrics.  \n- Design scalable sales processes and reporting systems.  \n- Over time, hire, mentor, and develop a high-performing commercial team.  \n- Implement KPIs aligned with company objectives.\n\n- Cross-Functional Leadership  \n- Partner closely with Product and Engineering to ensure customer insights inform product roadmap.  \n- Translate technical capabilities into clear business value for customers.  \n- Contribute to overall company strategy as a member of the executive leadership team.\n\n- Market Representation\n\n**Qualifications**\n\n- Extensive experience selling complex, technical solutions in semiconductor, hardware, AI infrastructure, EDA, or enterprise deep-tech environments.  \n- Proven track record of closing high-value enterprise deals.  \n- Experience engaging engineering-led organizations and technical decision-makers.  \n- Strong executive presence and negotiation skills.  \n- Experience operating in startup or high-growth environments.  \n- Builder mindset with both strategic vision and hands-on execution capability.\n\n**Preferred Experience**\n\n- Deep familiarity with semiconductor design flows, chip architecture, or hardware ecosystems.  \n- Established industry relationships within semiconductor or AI hardware markets.  \n- Experience building or scaling enterprise sales organizations.","categories":["Sales & Field"],"employment_type":"FULL_TIME","experience_level":"EXECUTIVE","workplace_type":"Onsite","salary":{"min":250000,"max":300000,"currency":"USD","period":"YEARLY"}},{"uuid":"0a2ecd83-b55f-476f-acaf-b56fde57b4e4","title":"Director of Software Engineering","content":"**job title**\n\nDirector of Software Engineering\n\n**job description**\n\n**Director of Software Engineering**\n\n**About the Role**\n\n- We are seeking a software engineering leader (Director or an experienced Sr. Manager ready to grow into this role) to join our US Headquarters. This is a high-impact opportunity to help shape the technical and product direction of a fast-growing, AI-driven SaaS company that is transforming semiconductor design. In this role, you'll lead engineering teams at the heart of Cognichip's product delivery. You will work closely with Product Management, business stakeholders, and AI\/chip engineering leaders to ensure that Cognichip's technology not only scales but also delivers clear value to customers. You'll be responsible for technical oversight, delivery ownership, and culture building. While you won't be coding daily, you'll remain close enough to the stack to mentor engineers, guide architecture, and participate meaningfully in design discussions. This role requires a leader who thrives at the intersection of engineering execution and product\/business alignment.\n\n**Key Responsibilities**\n\n**Lead & Scale Engineering Teams**\n\n- Build and grow high-performing engineering teams across multiple disciplines (frontend\/IDE, backend\/platform, ML\/AI, devtools)\n- Establish and reinforce a strong, collaborative, high-performance culture\n- Recruit, develop, and retain top engineering talent; mentor technical leads and future managers\n\n**Stay Technically Engaged**\n\n- Maintain technical credibility in modern SaaS, cloud-native, and AI\/ML stacks\n- Participate in design and architecture reviews to ensure sound technical decision-making\n- Champion best practices for testing, modularity, documentation, and performance\n\n**Drive Product & Business Alignment**\n\n- Partner closely with Product Management and business teams to shape roadmaps and ensure engineering delivery maps to customer and market needs\n- Translate product strategy into executable engineering plans with measurable outcomes\n- Balance technical innovation with business priorities and time-to-market pressures\n\n**Own End-to-End Delivery**\n\n- Drive delivery across value streams: from roadmap planning and design through execution, launch, and adoption\n- Ensure scalability, reliability, and security are built into the product from day one\n- Foster engineering excellence and accountability across teams\n\n**Bridge Technical & Cross-Functional Teams**\n\n- Collaborate with AI scientists, chip engineers, and product leaders to deliver cohesive solutions\n- Act as a key communication link between engineering execution and business strategy\n- Define engineering rituals, metrics, and collaboration practices that improve alignment across functions\n\n**Ideal Experience**\n\n- Proven leadership experience (Sr. Manager, Director, or equivalent) leading teams of 15+ cross-disciplinary engineers, with demonstrated ability to scale organizations\n- 10+ years of professional experience, including progression from hands-on engineer \u2192 tech lead \u2192 organizational leadership\n- Technical awareness and credibility in modern software stacks (cloud-native, AI\/ML, SaaS), even if not coding daily\n- Strong track record in end-to-end product delivery, including aligning engineering with product and business strategy\n- Excellent people leadership skills: hiring, mentoring, and developing engineers and technical leaders\n- Strong collaboration and communication skills; effective working across engineering, product, and business stakeholders\n- Prior experience in enterprise SaaS, developer tools, or AI\/ML infrastructure is strongly preferred\n\n**What We Offer**\n\n- A pivotal role in shaping Cognichip's core product and technical execution from the US HQ\n- Direct partnership with Product Management, business leadership, and cross-disciplinary engineering leaders\n- Work at the intersection of AI, semiconductors, and developer tools, solving technically challenging and high-impact problems\n- Competitive compensation package, including early-stage equity in a fast-growing AI startup\n- A high-trust, low-ego team culture that values ownership, curiosity, and collaboration\n\n**Level**\n\n- We are targeting candidates who are currently at the Director level for this role. However, if you are a Sr. Manager with proven experience as outlined in the \"Ideal Experience\" section and are ready to take the next step, we encourage you to apply.","url":null,"created_at":"2026-04-27T16:44:10.000000Z","department":"Software Eng","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**job title**\n\nDirector of Software Engineering\n\n**job description**\n\n**Director of Software Engineering**\n\n**About the Role**\n\n- We are seeking a software engineering leader (Director or an experienced Sr. Manager ready to grow into this role) to join our US Headquarters. This is a high-impact opportunity to help shape the technical and product direction of a fast-growing, AI-driven SaaS company that is transforming semiconductor design. In this role, you'll lead engineering teams at the heart of Cognichip's product delivery. You will work closely with Product Management, business stakeholders, and AI\/chip engineering leaders to ensure that Cognichip's technology not only scales but also delivers clear value to customers. You'll be responsible for technical oversight, delivery ownership, and culture building. While you won't be coding daily, you'll remain close enough to the stack to mentor engineers, guide architecture, and participate meaningfully in design discussions. This role requires a leader who thrives at the intersection of engineering execution and product\/business alignment.\n\n**Key Responsibilities**\n\n**Lead & Scale Engineering Teams**\n\n- Build and grow high-performing engineering teams across multiple disciplines (frontend\/IDE, backend\/platform, ML\/AI, devtools)\n- Establish and reinforce a strong, collaborative, high-performance culture\n- Recruit, develop, and retain top engineering talent; mentor technical leads and future managers\n\n**Stay Technically Engaged**\n\n- Maintain technical credibility in modern SaaS, cloud-native, and AI\/ML stacks\n- Participate in design and architecture reviews to ensure sound technical decision-making\n- Champion best practices for testing, modularity, documentation, and performance\n\n**Drive Product & Business Alignment**\n\n- Partner closely with Product Management and business teams to shape roadmaps and ensure engineering delivery maps to customer and market needs\n- Translate product strategy into executable engineering plans with measurable outcomes\n- Balance technical innovation with business priorities and time-to-market pressures\n\n**Own End-to-End Delivery**\n\n- Drive delivery across value streams: from roadmap planning and design through execution, launch, and adoption\n- Ensure scalability, reliability, and security are built into the product from day one\n- Foster engineering excellence and accountability across teams\n\n**Bridge Technical & Cross-Functional Teams**\n\n- Collaborate with AI scientists, chip engineers, and product leaders to deliver cohesive solutions\n- Act as a key communication link between engineering execution and business strategy\n- Define engineering rituals, metrics, and collaboration practices that improve alignment across functions\n\n**Ideal Experience**\n\n- Proven leadership experience (Sr. Manager, Director, or equivalent) leading teams of 15+ cross-disciplinary engineers, with demonstrated ability to scale organizations\n- 10+ years of professional experience, including progression from hands-on engineer \u2192 tech lead \u2192 organizational leadership\n- Technical awareness and credibility in modern software stacks (cloud-native, AI\/ML, SaaS), even if not coding daily\n- Strong track record in end-to-end product delivery, including aligning engineering with product and business strategy\n- Excellent people leadership skills: hiring, mentoring, and developing engineers and technical leaders\n- Strong collaboration and communication skills; effective working across engineering, product, and business stakeholders\n- Prior experience in enterprise SaaS, developer tools, or AI\/ML infrastructure is strongly preferred\n\n**What We Offer**\n\n- A pivotal role in shaping Cognichip's core product and technical execution from the US HQ\n- Direct partnership with Product Management, business leadership, and cross-disciplinary engineering leaders\n- Work at the intersection of AI, semiconductors, and developer tools, solving technically challenging and high-impact problems\n- Competitive compensation package, including early-stage equity in a fast-growing AI startup\n- A high-trust, low-ego team culture that values ownership, curiosity, and collaboration\n\n**Level**\n\n- We are targeting candidates who are currently at the Director level for this role. However, if you are a Sr. Manager with proven experience as outlined in the \"Ideal Experience\" section and are ready to take the next step, we encourage you to apply.","categories":["Engineering"],"employment_type":"FULL_TIME","experience_level":"DIRECTOR","workplace_type":"Onsite","salary":{"min":235000,"max":295000,"currency":"USD","period":"YEARLY"}},{"uuid":"7953e1df-7e00-4021-af86-4029aec50b00","title":"Senior Design Verification Engineer","content":"**Job Title**\n\nSenior Design Verification Engineer\n\n**About Cognichip**\n\n- At Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips.  \n- Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world's most complex engineering disciplines.\n\n**About the Role**\n\n- We are seeking a Senior Design Verification Engineer who can combine strong verification expertise with applied AI\/ML collaboration to help build production-grade tools for chip verification.  \n- In this role, you will help turn advanced research ideas into practical workflows used by engineers verifying real silicon.  \n- This work matters because verification is one of the biggest bottlenecks in modern chip design, and AI-native systems can meaningfully change the speed, quality, and scale of verification work.\n\n**Key Responsibilities**\n\n- Bridge Hardware and Software: Translate verification domain expertise into clear requirements that inform tool development and model behavior.  \n- Support Data Pipelines: Contribute to workflows that generate synthetic or augmented verification code and testbenches, creating the datasets needed to train and evaluate AI models.  \n- Workflow Optimization: Help refine automated workflows for verification-related tasks such as test planning, coverage analysis, and bug triage.  \n- Infrastructure Support: Build and maintain simulation and testing infrastructure to validate AI-generated verification artifacts.  \n- Collaboration: Work closely with AI researchers, software engineers, and other hardware engineers to ensure verification requirements are accurately reflected in tools and models.\n\n**Required Qualifications**\n\n- Experience: 5\u20138+ years of experience in design verification or hardware-focused software development.  \n- Verification Domain: Strong understanding of verification methodologies and testbench development for digital designs.  \n- EDA Tools: Practical experience with industry-standard simulation and verification tools.  \n- Software Proficiency: Solid programming skills in Python, C++, or similar languages.  \n- AI\/ML Exposure: Interest in or exposure to LLMs, prompt engineering, or machine learning frameworks applied to technical domains (prior hands-on ML experience is a plus, not required).  \n- Education: BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.\n\n**Preferred Qualifications**\n\n- Experience contributing to or building automated\/agentic workflows for engineering tasks.  \n- Background in computer architecture, particularly for AI accelerators or high-performance computing.  \n- Contributions to open-source hardware or AI projects.\n\n**What It's Like Here**\n\n- We're a fast-moving AI startup with a collaborative, high-trust culture.  \n- We value technical excellence, ownership, and the freedom to experiment.  \n- Our best work happens when our builders and innovators work closely together to turn ambitious ideas into category-defining products.  \n- We operate on a hybrid schedule with four days in office, one day remote.  \n- If you're excited to build tools that empower semiconductor engineers and reshape how chips are verified, you'll feel right at home.","url":null,"created_at":"2026-04-27T22:42:27.000000Z","department":"Hardware Eng","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nSenior Design Verification Engineer\n\n**About Cognichip**\n\n- At Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips.  \n- Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world's most complex engineering disciplines.\n\n**About the Role**\n\n- We are seeking a Senior Design Verification Engineer who can combine strong verification expertise with applied AI\/ML collaboration to help build production-grade tools for chip verification.  \n- In this role, you will help turn advanced research ideas into practical workflows used by engineers verifying real silicon.  \n- This work matters because verification is one of the biggest bottlenecks in modern chip design, and AI-native systems can meaningfully change the speed, quality, and scale of verification work.\n\n**Key Responsibilities**\n\n- Bridge Hardware and Software: Translate verification domain expertise into clear requirements that inform tool development and model behavior.  \n- Support Data Pipelines: Contribute to workflows that generate synthetic or augmented verification code and testbenches, creating the datasets needed to train and evaluate AI models.  \n- Workflow Optimization: Help refine automated workflows for verification-related tasks such as test planning, coverage analysis, and bug triage.  \n- Infrastructure Support: Build and maintain simulation and testing infrastructure to validate AI-generated verification artifacts.  \n- Collaboration: Work closely with AI researchers, software engineers, and other hardware engineers to ensure verification requirements are accurately reflected in tools and models.\n\n**Required Qualifications**\n\n- Experience: 5\u20138+ years of experience in design verification or hardware-focused software development.  \n- Verification Domain: Strong understanding of verification methodologies and testbench development for digital designs.  \n- EDA Tools: Practical experience with industry-standard simulation and verification tools.  \n- Software Proficiency: Solid programming skills in Python, C++, or similar languages.  \n- AI\/ML Exposure: Interest in or exposure to LLMs, prompt engineering, or machine learning frameworks applied to technical domains (prior hands-on ML experience is a plus, not required).  \n- Education: BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.\n\n**Preferred Qualifications**\n\n- Experience contributing to or building automated\/agentic workflows for engineering tasks.  \n- Background in computer architecture, particularly for AI accelerators or high-performance computing.  \n- Contributions to open-source hardware or AI projects.\n\n**What It's Like Here**\n\n- We're a fast-moving AI startup with a collaborative, high-trust culture.  \n- We value technical excellence, ownership, and the freedom to experiment.  \n- Our best work happens when our builders and innovators work closely together to turn ambitious ideas into category-defining products.  \n- We operate on a hybrid schedule with four days in office, one day remote.  \n- If you're excited to build tools that empower semiconductor engineers and reshape how chips are verified, you'll feel right at home.","categories":[],"employment_type":"FULL_TIME","experience_level":"MID_SENIOR_LEVEL","workplace_type":"Onsite","salary":{"min":160000,"max":190000,"currency":"USD","period":"YEARLY"}},{"uuid":"bea2a11a-6cae-44f0-a9da-4b1ad210c0bb","title":"Senior Design Verification Engineer","content":"**Job Title**\n\nSenior Design Verification Engineer\n\n**About Cognichip**\n\n- At Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips.  \n- Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world's most complex engineering disciplines.\n\n**About the Role**\n\n- We are seeking a Senior Design Verification Engineer who can combine strong verification expertise with applied AI\/ML collaboration to help build production-grade tools for chip verification.  \n- In this role, you will help turn advanced research ideas into practical workflows used by engineers verifying real silicon.  \n- This work matters because verification is one of the biggest bottlenecks in modern chip design, and AI-native systems can meaningfully change the speed, quality, and scale of verification work.\n\n**Key Responsibilities**\n\n- Bridge Hardware and Software: Translate verification domain expertise into clear requirements that inform tool development and model behavior.  \n- Support Data Pipelines: Contribute to workflows that generate synthetic or augmented verification code and testbenches, creating the datasets needed to train and evaluate AI models.  \n- Workflow Optimization: Help refine automated workflows for verification-related tasks such as test planning, coverage analysis, and bug triage.  \n- Infrastructure Support: Build and maintain simulation and testing infrastructure to validate AI-generated verification artifacts.  \n- Collaboration: Work closely with AI researchers, software engineers, and other hardware engineers to ensure verification requirements are accurately reflected in tools and models.\n\n**Required Qualifications**\n\n- Experience: 5\u20138+ years of experience in design verification or hardware-focused software development.  \n- Verification Domain: Strong understanding of verification methodologies and testbench development for digital designs.  \n- EDA Tools: Practical experience with industry-standard simulation and verification tools.  \n- Software Proficiency: Solid programming skills in Python, C++, or similar languages.  \n- AI\/ML Exposure: Interest in or exposure to LLMs, prompt engineering, or machine learning frameworks applied to technical domains (prior hands-on ML experience is a plus, not required).  \n- Education: BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.\n\n**Preferred Qualifications**\n\n- Experience contributing to or building automated\/agentic workflows for engineering tasks.  \n- Background in computer architecture, particularly for AI accelerators or high-performance computing.  \n- Contributions to open-source hardware or AI projects.\n\n**What It's Like Here**\n\n- We're a fast-moving AI startup with a collaborative, high-trust culture.  \n- We value technical excellence, ownership, and the freedom to experiment.  \n- Our best work happens when our builders and innovators work closely together to turn ambitious ideas into category-defining products.  \n- We operate on a hybrid schedule with four days in office, one day remote.  \n- If you're excited to build tools that empower semiconductor engineers and reshape how chips are verified, you'll feel right at home.","url":null,"created_at":"2026-04-27T22:42:27.000000Z","department":"Hardware Eng","job_type":null,"location":"\ud83c\udde8\ud83c\udde6 Toronto","description":"**Job Title**\n\nSenior Design Verification Engineer\n\n**About Cognichip**\n\n- At Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips.  \n- Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world's most complex engineering disciplines.\n\n**About the Role**\n\n- We are seeking a Senior Design Verification Engineer who can combine strong verification expertise with applied AI\/ML collaboration to help build production-grade tools for chip verification.  \n- In this role, you will help turn advanced research ideas into practical workflows used by engineers verifying real silicon.  \n- This work matters because verification is one of the biggest bottlenecks in modern chip design, and AI-native systems can meaningfully change the speed, quality, and scale of verification work.\n\n**Key Responsibilities**\n\n- Bridge Hardware and Software: Translate verification domain expertise into clear requirements that inform tool development and model behavior.  \n- Support Data Pipelines: Contribute to workflows that generate synthetic or augmented verification code and testbenches, creating the datasets needed to train and evaluate AI models.  \n- Workflow Optimization: Help refine automated workflows for verification-related tasks such as test planning, coverage analysis, and bug triage.  \n- Infrastructure Support: Build and maintain simulation and testing infrastructure to validate AI-generated verification artifacts.  \n- Collaboration: Work closely with AI researchers, software engineers, and other hardware engineers to ensure verification requirements are accurately reflected in tools and models.\n\n**Required Qualifications**\n\n- Experience: 5\u20138+ years of experience in design verification or hardware-focused software development.  \n- Verification Domain: Strong understanding of verification methodologies and testbench development for digital designs.  \n- EDA Tools: Practical experience with industry-standard simulation and verification tools.  \n- Software Proficiency: Solid programming skills in Python, C++, or similar languages.  \n- AI\/ML Exposure: Interest in or exposure to LLMs, prompt engineering, or machine learning frameworks applied to technical domains (prior hands-on ML experience is a plus, not required).  \n- Education: BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.\n\n**Preferred Qualifications**\n\n- Experience contributing to or building automated\/agentic workflows for engineering tasks.  \n- Background in computer architecture, particularly for AI accelerators or high-performance computing.  \n- Contributions to open-source hardware or AI projects.\n\n**What It's Like Here**\n\n- We're a fast-moving AI startup with a collaborative, high-trust culture.  \n- We value technical excellence, ownership, and the freedom to experiment.  \n- Our best work happens when our builders and innovators work closely together to turn ambitious ideas into category-defining products.  \n- We operate on a hybrid schedule with four days in office, one day remote.  \n- If you're excited to build tools that empower semiconductor engineers and reshape how chips are verified, you'll feel right at home.","categories":[],"employment_type":"FULL_TIME","experience_level":"MID_SENIOR_LEVEL","workplace_type":"Onsite","salary":{"min":150000,"max":180000,"currency":"CAD","period":"YEARLY"}},{"uuid":"c4cdbc87-7f70-4c18-ae07-5cb2a8dbdb7c","title":"Staff Software Engineer \u2013 Developer Tooling","content":"**Job Title**\n\nStaff Software Engineer \u2013 Developer Tooling\n\n**Staff Software Engineer \u2013 Developer Tooling**\n\nAt Cognichip, we are building the next-generation IDE to empower semiconductor design engineers with a 10x productivity boost through AI-native workflows and seamless integration with high-performance simulation engines. We are seeking a Staff Software Engineer with expertise in desktop application development (especially Electron\/VS Code extensions) to join our IDE team. Unlike traditional web roles, this position focuses on developing and extending a VS Code\u2013based IDE, creating deep integrations with AI, collaborative editing features, and advanced visualizations tailored for semiconductor design workflows.\n\n**Core Responsibilities**\n\n- Design, implement, and maintain VS Code extensions and Electron-based IDE features for the Cognichip platform.\n- Develop advanced IDE features such as AI-assisted coding, linting, collaborative editing, syntax highlighting, and domain-specific visualizations.\n- Integrate the IDE with backend microservices and APIs, ensuring seamless performance across distributed environments.\n- Build and optimize cross-platform desktop experiences (Windows, macOS, Linux).\n- Collaborate closely with designers to implement polished, intuitive UI\/UX patterns inside the IDE.\n- Contribute to performance profiling, debugging, and optimizations to ensure a responsive and reliable user experience.\n- Guide junior developers towards best practices\n\n**Required Qualifications**\n\n- 10+ years of software engineering experience, with 4+ years in desktop application development (Electron, VS Code extensions, or similar IDE frameworks).\n- Strong proficiency in TypeScript, JavaScript, React, and ES6+.\n- Experience developing VS Code extensions or other plugin-based IDE architectures.\n- Solid understanding of state management (e.g., Redux, Zustand) and component-driven UI frameworks.\n- Knowledge of cross-platform application design (Windows, macOS, Linux).\n- Familiarity with performance profiling and optimization in IDE or desktop applications.\n- Experience with version control and CI\/CD workflows (GitHub, Jenkins, etc.).\n\n**Preferred Qualifications**\n\n- Exposure to LLMs, AI-driven developer tools, or intelligent assistants inside IDEs.\n- Knowledge of Electron internals and packaging\/distribution of desktop applications.\n- Experience with language parsers, syntax highlighting, lexical analysis, and editor\/IDE UX patterns.\n- Experience implementing authentication, permissions, and role-based access in desktop apps.\n- Familiarity with semiconductor design tools or EDA workflows.\n\n**What We Offer**\n\n- Opportunity to shape the Cognichip IDE, a flagship product at the intersection of AI, semiconductor design, and developer productivity.\n- Competitive compensation package including equity.\n- Work alongside world-class engineers, scientists, and product designers.\n- Collaborative and innovative startup culture where your impact is direct and visible","url":null,"created_at":"2026-04-29T18:36:25.000000Z","department":"Software Eng","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nStaff Software Engineer \u2013 Developer Tooling\n\n**Staff Software Engineer \u2013 Developer Tooling**\n\nAt Cognichip, we are building the next-generation IDE to empower semiconductor design engineers with a 10x productivity boost through AI-native workflows and seamless integration with high-performance simulation engines. We are seeking a Staff Software Engineer with expertise in desktop application development (especially Electron\/VS Code extensions) to join our IDE team. Unlike traditional web roles, this position focuses on developing and extending a VS Code\u2013based IDE, creating deep integrations with AI, collaborative editing features, and advanced visualizations tailored for semiconductor design workflows.\n\n**Core Responsibilities**\n\n- Design, implement, and maintain VS Code extensions and Electron-based IDE features for the Cognichip platform.\n- Develop advanced IDE features such as AI-assisted coding, linting, collaborative editing, syntax highlighting, and domain-specific visualizations.\n- Integrate the IDE with backend microservices and APIs, ensuring seamless performance across distributed environments.\n- Build and optimize cross-platform desktop experiences (Windows, macOS, Linux).\n- Collaborate closely with designers to implement polished, intuitive UI\/UX patterns inside the IDE.\n- Contribute to performance profiling, debugging, and optimizations to ensure a responsive and reliable user experience.\n- Guide junior developers towards best practices\n\n**Required Qualifications**\n\n- 10+ years of software engineering experience, with 4+ years in desktop application development (Electron, VS Code extensions, or similar IDE frameworks).\n- Strong proficiency in TypeScript, JavaScript, React, and ES6+.\n- Experience developing VS Code extensions or other plugin-based IDE architectures.\n- Solid understanding of state management (e.g., Redux, Zustand) and component-driven UI frameworks.\n- Knowledge of cross-platform application design (Windows, macOS, Linux).\n- Familiarity with performance profiling and optimization in IDE or desktop applications.\n- Experience with version control and CI\/CD workflows (GitHub, Jenkins, etc.).\n\n**Preferred Qualifications**\n\n- Exposure to LLMs, AI-driven developer tools, or intelligent assistants inside IDEs.\n- Knowledge of Electron internals and packaging\/distribution of desktop applications.\n- Experience with language parsers, syntax highlighting, lexical analysis, and editor\/IDE UX patterns.\n- Experience implementing authentication, permissions, and role-based access in desktop apps.\n- Familiarity with semiconductor design tools or EDA workflows.\n\n**What We Offer**\n\n- Opportunity to shape the Cognichip IDE, a flagship product at the intersection of AI, semiconductor design, and developer productivity.\n- Competitive compensation package including equity.\n- Work alongside world-class engineers, scientists, and product designers.\n- Collaborative and innovative startup culture where your impact is direct and visible","categories":[],"employment_type":"FULL_TIME","experience_level":"MID_SENIOR_LEVEL","workplace_type":"Onsite","salary":{"min":195000,"max":230000,"currency":"USD","period":"YEARLY"}},{"uuid":"1e30f85d-b493-47d2-952f-05ee1b8afdcb","title":"Sr. Software Engineer - Agentic AI Systems","content":"**Job Title**\n\nSr. Software Engineer - Agentic AI Systems\n\n**About the Role**\n\n- We are seeking an AI Engineer to design, implement, and deploy advanced agentic AI systems. In this role, you\u2019ll build production-ready AI agents that can reason across multiple steps, leverage a mixture of proprietary models, integrate with semiconductor design tools, and operate autonomously over a long period of time.\n- You\u2019ll work with state of the art frameworks to create pipelines that combine LLM-based reasoning, knowledge grounding, and multi-agent orchestration.\n- This is a high-impact role where you\u2019ll partner with research and engineering teams to translate cutting-edge chip design workflows into reliable, scalable agentic solutions for real-world use cases.\n\n**Key Responsibilities**\n\n- Build Agentic Systems \u2013 Implement multi-step reasoning agents with advanced memory, Retrieval-Augmented Generation (RAG), and integrations to tools, databases, and APIs.\n- Evaluate and Optimize Agent Performance \u2013 Define and implement evaluation pipelines for agentic systems, including success\/failure classification, grounding accuracy, reasoning robustness, tool-use reliability, and long-horizon task completion. Use metrics and benchmarks to continuously improve performance in production environments.\n- Orchestrate & Optimize \u2013 Design supervisor\/sub-agent patterns, enable coordination across agents, and apply best practices for robustness, performance, and scalability.\n- Deploy & Evolve \u2013 Deliver production-grade agentic AI workflows on cloud platforms (AWS preferred), monitor and evaluate agent performance, and continuously fine-tune for quality and efficiency.\n- Collaborate & Translate \u2013 Work with product managers, researchers, and engineers to transform complex chip design workflows into agent-driven, end-to-end solutions.\n\n**Desired Skillset**\n\n- Agentic AI Systems\n- Evaluation and Optimization\n- Cloud & Infrastructure\n- Programming & Development\n\n**Required Qualifications**\n\n- Bachelor\u2019s or Master\u2019s degree in Computer Science, Software Engineering or a related field.\n- 5-10 years of experience in software development in cloud environment\n- 2+ years of experience with hands-on experience building and deploying production-grade agentic AI systems with real-world applications.\n- Solid working knowledge of Retrieval-Augmented Generation (RAG), agent performance evaluation, and hands-on experience with LangGraph and LangSmith platforms.\n- Proficiency in Python and familiarity with backend cloud services (preferably AWS).\n\n**Preferred Qualifications**\n\n- Contributions to open-source AI projects or frameworks.\n- Experience with multi-agent orchestration patterns at scale.\n- Knowledge of reinforcement learning, planning algorithms, or autonomous reasoning.\n- Track record of deploying agentic AI systems in production at scale\n\n**What We Offer**\n\n- The chance to work on state-of-the-art AI systems that push the boundaries of autonomy and reasoning.\n- A collaborative environment where engineering meets research.\n- Competitive compensation and equity in a fast-growing AI startup.\n- A culture that values ownership, curiosity, and technical excellence.","url":null,"created_at":"2026-04-29T18:36:30.000000Z","department":"Software Eng","job_type":null,"location":"\ud83c\udde8\ud83c\udde6 Toronto","description":"**Job Title**\n\nSr. Software Engineer - Agentic AI Systems\n\n**About the Role**\n\n- We are seeking an AI Engineer to design, implement, and deploy advanced agentic AI systems. In this role, you\u2019ll build production-ready AI agents that can reason across multiple steps, leverage a mixture of proprietary models, integrate with semiconductor design tools, and operate autonomously over a long period of time.\n- You\u2019ll work with state of the art frameworks to create pipelines that combine LLM-based reasoning, knowledge grounding, and multi-agent orchestration.\n- This is a high-impact role where you\u2019ll partner with research and engineering teams to translate cutting-edge chip design workflows into reliable, scalable agentic solutions for real-world use cases.\n\n**Key Responsibilities**\n\n- Build Agentic Systems \u2013 Implement multi-step reasoning agents with advanced memory, Retrieval-Augmented Generation (RAG), and integrations to tools, databases, and APIs.\n- Evaluate and Optimize Agent Performance \u2013 Define and implement evaluation pipelines for agentic systems, including success\/failure classification, grounding accuracy, reasoning robustness, tool-use reliability, and long-horizon task completion. Use metrics and benchmarks to continuously improve performance in production environments.\n- Orchestrate & Optimize \u2013 Design supervisor\/sub-agent patterns, enable coordination across agents, and apply best practices for robustness, performance, and scalability.\n- Deploy & Evolve \u2013 Deliver production-grade agentic AI workflows on cloud platforms (AWS preferred), monitor and evaluate agent performance, and continuously fine-tune for quality and efficiency.\n- Collaborate & Translate \u2013 Work with product managers, researchers, and engineers to transform complex chip design workflows into agent-driven, end-to-end solutions.\n\n**Desired Skillset**\n\n- Agentic AI Systems\n- Evaluation and Optimization\n- Cloud & Infrastructure\n- Programming & Development\n\n**Required Qualifications**\n\n- Bachelor\u2019s or Master\u2019s degree in Computer Science, Software Engineering or a related field.\n- 5-10 years of experience in software development in cloud environment\n- 2+ years of experience with hands-on experience building and deploying production-grade agentic AI systems with real-world applications.\n- Solid working knowledge of Retrieval-Augmented Generation (RAG), agent performance evaluation, and hands-on experience with LangGraph and LangSmith platforms.\n- Proficiency in Python and familiarity with backend cloud services (preferably AWS).\n\n**Preferred Qualifications**\n\n- Contributions to open-source AI projects or frameworks.\n- Experience with multi-agent orchestration patterns at scale.\n- Knowledge of reinforcement learning, planning algorithms, or autonomous reasoning.\n- Track record of deploying agentic AI systems in production at scale\n\n**What We Offer**\n\n- The chance to work on state-of-the-art AI systems that push the boundaries of autonomy and reasoning.\n- A collaborative environment where engineering meets research.\n- Competitive compensation and equity in a fast-growing AI startup.\n- A culture that values ownership, curiosity, and technical excellence.","categories":[],"employment_type":"FULL_TIME","experience_level":"MID_SENIOR_LEVEL","workplace_type":"Onsite","salary":{"min":150000,"max":200000,"currency":"CAD","period":"YEARLY"}},{"uuid":"d95bbde2-8d52-4e53-ada9-f3d52877ac69","title":"Executive Account Manager","content":"**Job Title**\n\nExecutive Account Manager\n\n**Job description**\n\n- Executive Account Manager  \nWe are seeking an exceptional, technically proficient Account Executive to drive business development and strategic sales engagements with the world's top-20 semiconductor companies for our cutting-edge AI design software.  \nThis high-visibility global role involves building and nurturing executive relationships with major semiconductor leaders, orchestrating complex multi-stakeholder sales cycles, and positioning our AI solutions as transformative tools for next-generation chip design.  \nThe ideal candidate possesses deep semiconductor industry expertise, proven success managing strategic enterprise accounts, and the ability to navigate sophisticated global organizations to close multi-million dollar deals.  \n\n**Key Responsibilities**\n\n- Own Strategic Accounts: Serve as the primary business development and sales leader for assigned top-20 semiconductor accounts, developing comprehensive account strategies that align with customer objectives and drive long-term partnership value.  \n- Manage Executive Relationships: Build and maintain C-suite and senior executive relationships (CEOs, CTOs, VPs of Engineering, R&D Directors) across global operations, establishing yourself as a strategic partner and trusted advisor.  \n- Orchestrate Global Account Activities: Drive sales activities across multiple geographies and business units within large, complex semiconductor organizations, ensuring consistent messaging and coordinated engagement strategies.  \n- Lead Complex Enterprise Sales: Drive the full enterprise sales cycle for strategic accounts, managing lengthy procurement processes, multi-stakeholder decision committees, and sophisticated contract negotiations to successful closure.  \n- Develop Strategic Engagements: Identify and cultivate high-value strategic opportunities within top-tier accounts, including enterprise-wide deployments, multi-year agreements, and expanded use cases that drive significant business impact.  \n- Develop Value Propositions & Business Cases: Articulate comprehensive technical and business value propositions tailored to each account's specific challenges, co-creating compelling ROI models that demonstrate time-to-market acceleration, cost reduction, and competitive advantage.  \n- Drive Pipeline & Forecast Management: Maintain rigorous pipeline discipline for strategic accounts, delivering accurate revenue forecasts to executive leadership and ensuring optimal resource allocation across high-value opportunities.  \n- Promote Visibility and Collaboration: Work closely with Product Management, Engineering, Customer Success, and Marketing teams to ensure customer insights inform product development, account strategies are aligned, and customer adoption is successful.  \n\n**Required Qualifications**\n\n- Experience: A minimum of 8-12 years of experience in business development and strategic account management, selling complex, high-value software solutions (ideally Electronic Design Automation\/EDA or AI software) to tier-1 semiconductor companies  \n- Strategic Account Success: Demonstrated track record of managing and growing top-tier strategic accounts, with proven ability to navigate complex global organizations  \n- Industry Network: Extensive, established network of executive relationships within the global semiconductor industry  \n- Technical Acumen: Deep understanding of semiconductor design workflows, chip architecture, and the strategic application of AI\/Machine Learning within the semiconductor design and manufacturing lifecycles  \n- Global Business Experience: Proven experience managing accounts with global footprints, coordinating across multiple regions, and navigating diverse business cultures and practices  \n- Education: Bachelor's degree in Engineering (Electrical Engineering, Computer Science, or similar technical field is highly desirable). MBA or equivalent business degree is a plus. Hands-on chip design experience is a plus.","url":null,"created_at":"2026-04-29T18:36:47.000000Z","department":"Product Marketing","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nExecutive Account Manager\n\n**Job description**\n\n- Executive Account Manager  \nWe are seeking an exceptional, technically proficient Account Executive to drive business development and strategic sales engagements with the world's top-20 semiconductor companies for our cutting-edge AI design software.  \nThis high-visibility global role involves building and nurturing executive relationships with major semiconductor leaders, orchestrating complex multi-stakeholder sales cycles, and positioning our AI solutions as transformative tools for next-generation chip design.  \nThe ideal candidate possesses deep semiconductor industry expertise, proven success managing strategic enterprise accounts, and the ability to navigate sophisticated global organizations to close multi-million dollar deals.  \n\n**Key Responsibilities**\n\n- Own Strategic Accounts: Serve as the primary business development and sales leader for assigned top-20 semiconductor accounts, developing comprehensive account strategies that align with customer objectives and drive long-term partnership value.  \n- Manage Executive Relationships: Build and maintain C-suite and senior executive relationships (CEOs, CTOs, VPs of Engineering, R&D Directors) across global operations, establishing yourself as a strategic partner and trusted advisor.  \n- Orchestrate Global Account Activities: Drive sales activities across multiple geographies and business units within large, complex semiconductor organizations, ensuring consistent messaging and coordinated engagement strategies.  \n- Lead Complex Enterprise Sales: Drive the full enterprise sales cycle for strategic accounts, managing lengthy procurement processes, multi-stakeholder decision committees, and sophisticated contract negotiations to successful closure.  \n- Develop Strategic Engagements: Identify and cultivate high-value strategic opportunities within top-tier accounts, including enterprise-wide deployments, multi-year agreements, and expanded use cases that drive significant business impact.  \n- Develop Value Propositions & Business Cases: Articulate comprehensive technical and business value propositions tailored to each account's specific challenges, co-creating compelling ROI models that demonstrate time-to-market acceleration, cost reduction, and competitive advantage.  \n- Drive Pipeline & Forecast Management: Maintain rigorous pipeline discipline for strategic accounts, delivering accurate revenue forecasts to executive leadership and ensuring optimal resource allocation across high-value opportunities.  \n- Promote Visibility and Collaboration: Work closely with Product Management, Engineering, Customer Success, and Marketing teams to ensure customer insights inform product development, account strategies are aligned, and customer adoption is successful.  \n\n**Required Qualifications**\n\n- Experience: A minimum of 8-12 years of experience in business development and strategic account management, selling complex, high-value software solutions (ideally Electronic Design Automation\/EDA or AI software) to tier-1 semiconductor companies  \n- Strategic Account Success: Demonstrated track record of managing and growing top-tier strategic accounts, with proven ability to navigate complex global organizations  \n- Industry Network: Extensive, established network of executive relationships within the global semiconductor industry  \n- Technical Acumen: Deep understanding of semiconductor design workflows, chip architecture, and the strategic application of AI\/Machine Learning within the semiconductor design and manufacturing lifecycles  \n- Global Business Experience: Proven experience managing accounts with global footprints, coordinating across multiple regions, and navigating diverse business cultures and practices  \n- Education: Bachelor's degree in Engineering (Electrical Engineering, Computer Science, or similar technical field is highly desirable). MBA or equivalent business degree is a plus. Hands-on chip design experience is a plus.","categories":["Sales & Field"],"employment_type":"FULL_TIME","experience_level":"DIRECTOR","workplace_type":"Onsite","salary":{"min":195000,"max":230000,"currency":"USD","period":"YEARLY"}},{"uuid":"98533d02-6021-47dd-8606-40d3a04cfeec","title":"Distinguished Silicon Architect","content":"**Job Title**\n\nDistinguished Silicon Architect\n\n**Job Description**\n\n**Distinguished Silicon Architect** Design agentic workflows, prompts, and domain knowledge that enable AI agents to perform production-quality chip design and verification. This role focuses on encoding deep silicon expertise - microarchitecture, RTL, DV, and EDA workflows - into structured agent behaviors, playbooks, and tool-aware processes.\n\n**Key Responsibilities**\n\n- Customer Engagement, Domain Knowledge, Tool Enablement\n- Enagage with customers to understand their pain points\n- Encode chip-design expertise (RTL\/DV best practices, microarchitectural patterns, failure modes) into reusable, agent-consumable knowledge and playbooks.\n- Define EDA tool usage for agents\u2014when to run simulation, lint, CDC, synthesis, and STA, how to interpret results, and how to chain tools into reliable flows.\n\n- Agent Workflow & Orchestration\n- Design end-to-end agent workflows for chip design, verification, debugging, and iterative refinement using structured process graphs.\n- Decompose complex silicon workflows into executable agent steps with clear inputs, outputs, and success criteria, including hierarchical and iterative patterns.\n\n- Prompt Engineering & Agent Behavior\n- Develop high-quality prompts covering specification, microarchitecture, RTL, verification, and debug.\n- Define agent behavior models, guardrails, and few-shot examples that guide reasoning, assumption validation, and error handling in chip-design tasks\n\n**Required Qualifications**\n\n- 20+ years of experience (Staff) across the key domains: Chip Design & Verification\n- Digital IC, ASIC, or SoC design or verification, with strong hands-on expertise in SystemVerilog RTL and UVM.\n- Deep familiarity with lint, CDC\/RDC, simulation, timing constraints, and STA, and a solid understanding of microarchitecture (pipelines, FIFOs, DMA, caches, interconnects).\n- Ability to clearly explain design tradeoffs and debugging strategies.\n- Agentic AI & Software Experience with LLM-based agent systems, prompt engineering, and workflow decomposition.\n- Familiarity with agent orchestration frameworks such as LangGraph, LangChain, AutoGen, or CrewAI, or equivalent custom systems.\n- Proficiency in Python and experience integrating external tools into automated workflows.","url":null,"created_at":"2026-05-01T00:05:03.000000Z","department":"Architecture","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nDistinguished Silicon Architect\n\n**Job Description**\n\n**Distinguished Silicon Architect** Design agentic workflows, prompts, and domain knowledge that enable AI agents to perform production-quality chip design and verification. This role focuses on encoding deep silicon expertise - microarchitecture, RTL, DV, and EDA workflows - into structured agent behaviors, playbooks, and tool-aware processes.\n\n**Key Responsibilities**\n\n- Customer Engagement, Domain Knowledge, Tool Enablement\n- Enagage with customers to understand their pain points\n- Encode chip-design expertise (RTL\/DV best practices, microarchitectural patterns, failure modes) into reusable, agent-consumable knowledge and playbooks.\n- Define EDA tool usage for agents\u2014when to run simulation, lint, CDC, synthesis, and STA, how to interpret results, and how to chain tools into reliable flows.\n\n- Agent Workflow & Orchestration\n- Design end-to-end agent workflows for chip design, verification, debugging, and iterative refinement using structured process graphs.\n- Decompose complex silicon workflows into executable agent steps with clear inputs, outputs, and success criteria, including hierarchical and iterative patterns.\n\n- Prompt Engineering & Agent Behavior\n- Develop high-quality prompts covering specification, microarchitecture, RTL, verification, and debug.\n- Define agent behavior models, guardrails, and few-shot examples that guide reasoning, assumption validation, and error handling in chip-design tasks\n\n**Required Qualifications**\n\n- 20+ years of experience (Staff) across the key domains: Chip Design & Verification\n- Digital IC, ASIC, or SoC design or verification, with strong hands-on expertise in SystemVerilog RTL and UVM.\n- Deep familiarity with lint, CDC\/RDC, simulation, timing constraints, and STA, and a solid understanding of microarchitecture (pipelines, FIFOs, DMA, caches, interconnects).\n- Ability to clearly explain design tradeoffs and debugging strategies.\n- Agentic AI & Software Experience with LLM-based agent systems, prompt engineering, and workflow decomposition.\n- Familiarity with agent orchestration frameworks such as LangGraph, LangChain, AutoGen, or CrewAI, or equivalent custom systems.\n- Proficiency in Python and experience integrating external tools into automated workflows.","categories":[],"employment_type":"FULL_TIME","experience_level":"DIRECTOR","workplace_type":"Onsite","salary":{"min":285000,"max":335000,"currency":"USD","period":"YEARLY"}},{"uuid":"8f26b403-8061-48b8-8675-4e6e157d1a84","title":"Staff ASIC Design Engineer","content":"**Job Title**\n\nStaff ASIC Design Engineer - Agentic Workflows\n\n**About Cognichip**\n\nAt Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips. Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world's most complex engineering disciplines.\n\n**About the Role**\n\nWe are seeking a Staff ASIC Design Engineer who will not just design chips, but will create the libraries, IP, benchmarks, and agent-ready knowledge that teach our AI how to design chips. This role sits at the heart of what makes Cognichip different.\n\nThe semiconductor industry has run the same design playbook for forty years. We are changing that by encoding deep silicon expertise directly into AI models and autonomous workflows. The person in this role will be the domain authority who makes that possible, translating hard-won chip design knowledge into the training data, benchmarks, and structured processes that power our platform.\n\nIf you want your expertise to outlast any single tape-out and instead shape how an entire industry designs silicon, this is that opportunity.\n\n**Key Responsibilities**\n\n- Encode your expert chip design knowledge including RTL\/DV best practices, microarchitectural patterns, and EDA tool usage directly into AI models that drive design process autonomously\n- Develop high-quality RTL libraries, IP blocks, and processor designs that serve as training data and composable components within our design environment\n- Design end-to-end workflows for chip design, verification, and debugging with clear inputs, outputs, and success criteria\n- Generate and curate large-scale datasets of syntactic and semantic hardware code to improve model robustness and design quality\n- Build and maintain benchmarks and reference designs that evaluate and accelerate the performance of our AI tooling\n- Collaborate closely with ML researchers and software engineers, serving as the primary hardware domain expert who translates silicon constraints into actionable model training and agentic design insights\n\n**Required Qualifications**\n\n- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a closely related field\n- 10 to 12+ years of experience in RTL design, verification, or both across digital IC, ASIC, or SoC\n- Strong hands-on expertise in SystemVerilog, RTL, lint, CDC\/RDC, STA, and microarchitecture\n- Experience with Xilinx\/AMD or Intel\/Altera ecosystems, or ASIC physical design chains including SoC and IP integration\n- Familiarity with industry-standard protocols such as PCIe, CXL, DDR5, and NoC\n- Proficiency in Python for design automation and tool integration\n- Strong written and verbal communication skills, with the ability to bridge chip design and AI\/software teams\n\n**Preferred Qualifications**\n\n- The following are not required but are great bonuses:\n- Experience with LLM-based agent systems, ML models, prompt engineering, or workflow decomposition\n- Familiarity with agent orchestration frameworks such as LangGraph, LangChain, or AutoGen\n- Experience with open-source EDA tools such as Verilator, CocoTB, Yosys, or OpenSTA\n- Demonstrated coursework or project experience in machine learning or deep learning\n- Personal projects showcasing innovation, continuous learning, or open-source contribution\n\n**What It's Like Here**\n\n- We are a fast-moving AI startup with a collaborative, high-trust culture\n- We value technical excellence, ownership, and the freedom to experiment\n- Our best work happens when builders and innovators work closely together to turn ambitious ideas into category-defining products\n- We operate on a hybrid schedule with four days in office, one day remote\n- If you are excited to build cutting-edge tools that empower semiconductor engineers and reshape how chips are designed, you will feel right at home.","url":null,"created_at":"2026-05-01T00:05:31.000000Z","department":"Hardware Eng","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nStaff ASIC Design Engineer - Agentic Workflows\n\n**About Cognichip**\n\nAt Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips. Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world's most complex engineering disciplines.\n\n**About the Role**\n\nWe are seeking a Staff ASIC Design Engineer who will not just design chips, but will create the libraries, IP, benchmarks, and agent-ready knowledge that teach our AI how to design chips. This role sits at the heart of what makes Cognichip different.\n\nThe semiconductor industry has run the same design playbook for forty years. We are changing that by encoding deep silicon expertise directly into AI models and autonomous workflows. The person in this role will be the domain authority who makes that possible, translating hard-won chip design knowledge into the training data, benchmarks, and structured processes that power our platform.\n\nIf you want your expertise to outlast any single tape-out and instead shape how an entire industry designs silicon, this is that opportunity.\n\n**Key Responsibilities**\n\n- Encode your expert chip design knowledge including RTL\/DV best practices, microarchitectural patterns, and EDA tool usage directly into AI models that drive design process autonomously\n- Develop high-quality RTL libraries, IP blocks, and processor designs that serve as training data and composable components within our design environment\n- Design end-to-end workflows for chip design, verification, and debugging with clear inputs, outputs, and success criteria\n- Generate and curate large-scale datasets of syntactic and semantic hardware code to improve model robustness and design quality\n- Build and maintain benchmarks and reference designs that evaluate and accelerate the performance of our AI tooling\n- Collaborate closely with ML researchers and software engineers, serving as the primary hardware domain expert who translates silicon constraints into actionable model training and agentic design insights\n\n**Required Qualifications**\n\n- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a closely related field\n- 10 to 12+ years of experience in RTL design, verification, or both across digital IC, ASIC, or SoC\n- Strong hands-on expertise in SystemVerilog, RTL, lint, CDC\/RDC, STA, and microarchitecture\n- Experience with Xilinx\/AMD or Intel\/Altera ecosystems, or ASIC physical design chains including SoC and IP integration\n- Familiarity with industry-standard protocols such as PCIe, CXL, DDR5, and NoC\n- Proficiency in Python for design automation and tool integration\n- Strong written and verbal communication skills, with the ability to bridge chip design and AI\/software teams\n\n**Preferred Qualifications**\n\n- The following are not required but are great bonuses:\n- Experience with LLM-based agent systems, ML models, prompt engineering, or workflow decomposition\n- Familiarity with agent orchestration frameworks such as LangGraph, LangChain, or AutoGen\n- Experience with open-source EDA tools such as Verilator, CocoTB, Yosys, or OpenSTA\n- Demonstrated coursework or project experience in machine learning or deep learning\n- Personal projects showcasing innovation, continuous learning, or open-source contribution\n\n**What It's Like Here**\n\n- We are a fast-moving AI startup with a collaborative, high-trust culture\n- We value technical excellence, ownership, and the freedom to experiment\n- Our best work happens when builders and innovators work closely together to turn ambitious ideas into category-defining products\n- We operate on a hybrid schedule with four days in office, one day remote\n- If you are excited to build cutting-edge tools that empower semiconductor engineers and reshape how chips are designed, you will feel right at home.","categories":[],"employment_type":"FULL_TIME","experience_level":"MID_SENIOR_LEVEL","workplace_type":"Onsite","salary":{"min":195000,"max":230000,"currency":"USD","period":"YEARLY"}},{"uuid":"c6d1f46c-e9fa-440b-9c18-96149fe8ca80","title":"Staff FPGA Engineer","content":"**Job Title**\n\nStaff Chip Design Engineer - FPGA\n\n**Job description**\n\n**Staff FPGA Design Engineer**\n\nWhy This Matters At Cognichip, we\u2019re not just building AI\u2014we\u2019re redefining what\u2019s possible at the nexus of silicon design and machine learning. As a Staff FPGA Design Engineer, you will fuse chip design expertise with cutting-edge ML to create the intelligent, end-to-end silicon design flows. If you thrive on pushing the envelope of the possible and translating cutting-edge ideas into production-grade systems, this is your stage.\n\n**What You'll Do**\n\n- Serve as the domain expert, embedding chip design intuition into a team creating AI chip design assistants\n- Architect modern EDA workflows, from spec to bitstream\n- Drive the development of agentic AI systems capable of authoring syntactically and semantically correct RTL, manage IP integration, and constructing processor-based designs\n- Create an ecosystem of libraries, tools, agents, workflows, and benchmarks to increase design velocity\n- Design and synthesize high-quality, complex datasets (RTL, IP, constraints, failure modes) to train models on hardware physics and logic\n- Define rigorous verification standards and guide the agent in generating robust UVM testbenches, assertions and coverage models to ensure generated designs are correct-by-construction\n\n**What You Bring**\n\n- Masters in Computer Science, Electrical Engineering, or a closely related field\n- 10-15 years of experience in RTL design, or a combination of design and verification\n- Deep expertise with AMD\/Xilinx (Vivado, Vitis) and Altera\/Intel (Quartus) ecosystems, including SoC and complex IP integrations\n- Knowledge of industry-standard communication protocols (AXI, Ethernet, PCIe, DDR5, SPI, I2C, NoC, etc)\n- Proficiency in SystemVerilog, Python, and TCL\n- Excellent written and verbal communication skills, especially to convey chip design knowledge to software engineers and AI scientists\n- Comfortable working in a dynamic, research-heavy AI-oriented startup environment\n\n**Bonus Points**\n\nThe following items are not required but are great bonuses:\n\n- Personal projects showcasing innovation, creativity, and continuous learning\n- Knowledge of open-source tools and contribution practices (Verilator, CocoTB, Yosys, OpenSTA, etc)\n- Experience with multiple areas of chip flow (RTL design, validation, synthesis, physical design, etc)\n- Demonstrated coursework or project experience in machine learning and\/or deep learning\n\n**What It's Like Here**\n\nWe\u2019re a fast-moving AI startup with a collaborative, high-trust culture. You\u2019ll work with top-tier engineers, scientists, and builders\u2014solving hard problems that sit at the intersection of cloud computing, AI, and chip design. We value technical excellence, ownership, and the freedom to experiment. If you\u2019re excited to build the future of engineering, you\u2019ll feel right at home.\n\n**Logistics**\n\nThis position is available in Toronto. We believe a mindmeld between engineers and scientists leads to our professional growth and to great products; we have a hybrid schedule with four days in office, one day remote.\n\n**How To Apply**\n\nDon\u2019t meet every single requirement? Feel over-qualified? That\u2019s okay\u2014if you're excited about our mission, we\u2019d still love to hear from you. We are growing fast and need a world class team of various experience levels.","url":null,"created_at":"2026-05-01T00:05:38.000000Z","department":"Hardware Eng","job_type":null,"location":"\ud83c\udde8\ud83c\udde6 Toronto","description":"**Job Title**\n\nStaff Chip Design Engineer - FPGA\n\n**Job description**\n\n**Staff FPGA Design Engineer**\n\nWhy This Matters At Cognichip, we\u2019re not just building AI\u2014we\u2019re redefining what\u2019s possible at the nexus of silicon design and machine learning. As a Staff FPGA Design Engineer, you will fuse chip design expertise with cutting-edge ML to create the intelligent, end-to-end silicon design flows. If you thrive on pushing the envelope of the possible and translating cutting-edge ideas into production-grade systems, this is your stage.\n\n**What You'll Do**\n\n- Serve as the domain expert, embedding chip design intuition into a team creating AI chip design assistants\n- Architect modern EDA workflows, from spec to bitstream\n- Drive the development of agentic AI systems capable of authoring syntactically and semantically correct RTL, manage IP integration, and constructing processor-based designs\n- Create an ecosystem of libraries, tools, agents, workflows, and benchmarks to increase design velocity\n- Design and synthesize high-quality, complex datasets (RTL, IP, constraints, failure modes) to train models on hardware physics and logic\n- Define rigorous verification standards and guide the agent in generating robust UVM testbenches, assertions and coverage models to ensure generated designs are correct-by-construction\n\n**What You Bring**\n\n- Masters in Computer Science, Electrical Engineering, or a closely related field\n- 10-15 years of experience in RTL design, or a combination of design and verification\n- Deep expertise with AMD\/Xilinx (Vivado, Vitis) and Altera\/Intel (Quartus) ecosystems, including SoC and complex IP integrations\n- Knowledge of industry-standard communication protocols (AXI, Ethernet, PCIe, DDR5, SPI, I2C, NoC, etc)\n- Proficiency in SystemVerilog, Python, and TCL\n- Excellent written and verbal communication skills, especially to convey chip design knowledge to software engineers and AI scientists\n- Comfortable working in a dynamic, research-heavy AI-oriented startup environment\n\n**Bonus Points**\n\nThe following items are not required but are great bonuses:\n\n- Personal projects showcasing innovation, creativity, and continuous learning\n- Knowledge of open-source tools and contribution practices (Verilator, CocoTB, Yosys, OpenSTA, etc)\n- Experience with multiple areas of chip flow (RTL design, validation, synthesis, physical design, etc)\n- Demonstrated coursework or project experience in machine learning and\/or deep learning\n\n**What It's Like Here**\n\nWe\u2019re a fast-moving AI startup with a collaborative, high-trust culture. You\u2019ll work with top-tier engineers, scientists, and builders\u2014solving hard problems that sit at the intersection of cloud computing, AI, and chip design. We value technical excellence, ownership, and the freedom to experiment. If you\u2019re excited to build the future of engineering, you\u2019ll feel right at home.\n\n**Logistics**\n\nThis position is available in Toronto. We believe a mindmeld between engineers and scientists leads to our professional growth and to great products; we have a hybrid schedule with four days in office, one day remote.\n\n**How To Apply**\n\nDon\u2019t meet every single requirement? Feel over-qualified? That\u2019s okay\u2014if you're excited about our mission, we\u2019d still love to hear from you. We are growing fast and need a world class team of various experience levels.","categories":[],"employment_type":"FULL_TIME","experience_level":"MID_SENIOR_LEVEL","workplace_type":"Onsite","salary":{"min":184000,"max":222000,"currency":"CAD","period":"YEARLY"}},{"uuid":"908f56f2-63ff-4e35-8175-ec4c232e0384","title":"Staff ASIC Design Engineer","content":"**Job Title**\n\nStaff ASIC Design Engineer\n\n**About Cognichip**\n\nAt Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips. Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world's most complex engineering disciplines.\n\n**About the Role**\n\nWe are seeking a Staff ASIC Design Engineer who will not just design chips, but will create the libraries, IP, benchmarks, and agent-ready knowledge that teach our AI how to design chips. This role sits at the heart of what makes Cognichip different. The semiconductor industry has run the same design playbook for forty years. We are changing that by encoding deep silicon expertise directly into AI models and autonomous workflows. The person in this role will be the domain authority who makes that possible, translating hard-won chip design knowledge into the training data, benchmarks, and structured processes that power our platform. If you want your expertise to outlast any single tape-out and instead shape how an entire industry designs silicon, this is that opportunity.\n\n**Key Responsibilities**\n\n- Encode your expert chip design knowledge including RTL\/DV best practices, microarchitectural patterns, and EDA tool usage directly into AI models that drive design process autonomously\n- Develop high-quality RTL libraries, IP blocks, and processor designs that serve as training data and composable components within our design environment\n- Design end-to-end workflows for chip design, verification, and debugging with clear inputs, outputs, and success criteria\n- Generate and curate large-scale datasets of syntactic and semantic hardware code to improve model robustness and design quality\n- Build and maintain benchmarks and reference designs that evaluate and accelerate the performance of our AI tooling\n- Collaborate closely with ML researchers and software engineers, serving as the primary hardware domain expert who translates silicon constraints into actionable model training and agentic design insights\n\n**Required Qualifications**\n\n- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a closely related field\n- 10 to 12+ years of experience in RTL design, verification, or both across digital IC, ASIC, or SoC\n- Strong hands-on expertise in SystemVerilog, RTL, lint, CDC\/RDC, STA, and microarchitecture\n- Experience with Xilinx\/AMD or Intel\/Altera ecosystems, or ASIC physical design chains including SoC and IP integration\n- Familiarity with industry-standard protocols such as PCIe, CXL, DDR5, and NoC\n- Proficiency in Python for design automation and tool integration\n- Strong written and verbal communication skills, with the ability to bridge chip design and AI\/software teams\n\n**Preferred Qualifications**\n\n- The following are not required but are great bonuses:\n- Experience with LLM-based agent systems, ML models, prompt engineering, or workflow decomposition\n- Familiarity with agent orchestration frameworks such as LangGraph, LangChain, or AutoGen\n- Experience with open-source EDA tools such as Verilator, CocoTB, Yosys, or OpenSTA\n- Demonstrated coursework or project experience in machine learning or deep learning\n- Personal projects showcasing innovation, continuous learning, or open-source contribution\n\n**What It's Like Here**\n\n- We are a fast-moving AI startup with a collaborative, high-trust culture\n- We value technical excellence, ownership, and the freedom to experiment\n- Our best work happens when builders and innovators work closely together to turn ambitious ideas into category-defining products\n- We operate on a hybrid schedule with four days in office, one day remote\n- If you are excited to build cutting-edge tools that empower semiconductor engineers and reshape how chips are designed, you will feel right at home.","url":null,"created_at":"2026-05-01T00:05:42.000000Z","department":"Hardware Eng","job_type":null,"location":"\ud83c\udde8\ud83c\udde6 Toronto","description":"**Job Title**\n\nStaff ASIC Design Engineer\n\n**About Cognichip**\n\nAt Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips. Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world's most complex engineering disciplines.\n\n**About the Role**\n\nWe are seeking a Staff ASIC Design Engineer who will not just design chips, but will create the libraries, IP, benchmarks, and agent-ready knowledge that teach our AI how to design chips. This role sits at the heart of what makes Cognichip different. The semiconductor industry has run the same design playbook for forty years. We are changing that by encoding deep silicon expertise directly into AI models and autonomous workflows. The person in this role will be the domain authority who makes that possible, translating hard-won chip design knowledge into the training data, benchmarks, and structured processes that power our platform. If you want your expertise to outlast any single tape-out and instead shape how an entire industry designs silicon, this is that opportunity.\n\n**Key Responsibilities**\n\n- Encode your expert chip design knowledge including RTL\/DV best practices, microarchitectural patterns, and EDA tool usage directly into AI models that drive design process autonomously\n- Develop high-quality RTL libraries, IP blocks, and processor designs that serve as training data and composable components within our design environment\n- Design end-to-end workflows for chip design, verification, and debugging with clear inputs, outputs, and success criteria\n- Generate and curate large-scale datasets of syntactic and semantic hardware code to improve model robustness and design quality\n- Build and maintain benchmarks and reference designs that evaluate and accelerate the performance of our AI tooling\n- Collaborate closely with ML researchers and software engineers, serving as the primary hardware domain expert who translates silicon constraints into actionable model training and agentic design insights\n\n**Required Qualifications**\n\n- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a closely related field\n- 10 to 12+ years of experience in RTL design, verification, or both across digital IC, ASIC, or SoC\n- Strong hands-on expertise in SystemVerilog, RTL, lint, CDC\/RDC, STA, and microarchitecture\n- Experience with Xilinx\/AMD or Intel\/Altera ecosystems, or ASIC physical design chains including SoC and IP integration\n- Familiarity with industry-standard protocols such as PCIe, CXL, DDR5, and NoC\n- Proficiency in Python for design automation and tool integration\n- Strong written and verbal communication skills, with the ability to bridge chip design and AI\/software teams\n\n**Preferred Qualifications**\n\n- The following are not required but are great bonuses:\n- Experience with LLM-based agent systems, ML models, prompt engineering, or workflow decomposition\n- Familiarity with agent orchestration frameworks such as LangGraph, LangChain, or AutoGen\n- Experience with open-source EDA tools such as Verilator, CocoTB, Yosys, or OpenSTA\n- Demonstrated coursework or project experience in machine learning or deep learning\n- Personal projects showcasing innovation, continuous learning, or open-source contribution\n\n**What It's Like Here**\n\n- We are a fast-moving AI startup with a collaborative, high-trust culture\n- We value technical excellence, ownership, and the freedom to experiment\n- Our best work happens when builders and innovators work closely together to turn ambitious ideas into category-defining products\n- We operate on a hybrid schedule with four days in office, one day remote\n- If you are excited to build cutting-edge tools that empower semiconductor engineers and reshape how chips are designed, you will feel right at home.","categories":[],"employment_type":"FULL_TIME","experience_level":"MID_SENIOR_LEVEL","workplace_type":"Onsite","salary":{"min":184000,"max":222000,"currency":"CAD","period":"YEARLY"}},{"uuid":"321c3de8-b0b8-4116-b975-aa97eeddf991","title":"Staff Chip Design Engineer - AI","content":"**Job Title**\n\nStaff Chip Design Engineer - AI\n\n**Job description**\n\n**Staff Chip Design Engineer - AI**\n\nWhy this matters At Cognichip, we're not just building AI; we're enabling our customers to harness the power of AI to transform their silicon design workflows. As a Chip Design Engineer , you'll be the crucial link between our groundbreaking Artificial Chip Intelligence (ACI) solutions and the design teams who will use them. You'll translate complex technical concepts into practical solutions, helping teams successfully adopt our solutions and unleash their creativity. If you thrive on solving technical challenges and empowering others to build the future, this is your stage.\n\n---\n\n**What you'll do**\n\n- Partner with ML and Software teams as a key hardware domain expert, translating complex silicon constraints into actionable insights for model training and agentic design\n- Build and maintain an ecosystem of benchmarks and evaluation infrastructure to measure and improve the quality of our tools\n- Execute and refine novel chip design methodologies, from architectural specs to synthesized netlists to complete bitstreams to identify where AI can optimize the flow\n- Generate and curate massive datasets of syntactic and semantic hardware code to improve model robustness\n- Implement robust verification environments, writing the SystemVerilog\/UVM testbenches and assertions with our tools that ensure our generated designs are correct-by-construction\n- Apply AI to real-world problems. Serve as the primary technical point of contact for customers, providing expert guidance and support to help them integrate Cognichip ACI\u00ae solutions into their design flows.\n\n---\n\n**What You Bring**\n\n- Master's degree in Computer Science, Electrical Engineering, or a closely related field.\n- 5+ years of experience in RTL design, verification, or a combination of both, with a passion for customer-facing roles.\n- Proficiency in Verilog\/SystemVerilog and scripting languages like Python for automation\n- Experience with digital design EDA tools such as AMD (Vivado), Altera\/Intel (Quartus) ecosystems or ASIC physical design chains, including SoC and IP integrations\n- Excellent written and verbal communication skills, with a strong ability to translate complex technical information into clear, actionable guidance.\n- A consultative, problem-solving mindset and a passion for helping others succeed.\n- Comfortable working in a dynamic, research-heavy AI-oriented startup environment\n\n---\n\n**Bonus Points**\n\nThe following items are not required but are great bonuses:\n\n- Personal projects showcasing innovation, creativity, and continuous learning\n- Knowledge of open-source tools and contribution practices (Verilator, CocoTB, Yosys, OpenSTA, etc)\n- Experience with multiple areas of chip flow (RTL design, validation, synthesis, physical design, etc) and with EDA tools and their application in real-world design flows.\n- Demonstrated coursework or project experience in machine learning and\/or deep learning\n- Prior experience in a field application engineering or customer success role.\n\n---\n\n**What it's like here**\n\nWe\u2019re a fast-moving AI startup with a collaborative, high-trust culture. You\u2019ll work alongside top-tier engineers and scientists, but your primary focus will be on our customers\u2014solving their hard problems and ensuring they can build the future of engineering. We value technical excellence, ownership, and the freedom to experiment. If you\u2019re excited to empower a new generation of chip designers, you\u2019ll feel right at home.\n\n---\n\n**Logistics**\n\nThis position is available in Toronto, Ontario. We believe a mindmeld between engineers and scientists leads to our professional growth and to great products. We have a hybrid schedule with four days in office, one day remote.","url":null,"created_at":"2026-05-01T00:06:04.000000Z","department":"Hardware Eng","job_type":null,"location":"\ud83c\udde8\ud83c\udde6 Toronto","description":"**Job Title**\n\nStaff Chip Design Engineer - AI\n\n**Job description**\n\n**Staff Chip Design Engineer - AI**\n\nWhy this matters At Cognichip, we're not just building AI; we're enabling our customers to harness the power of AI to transform their silicon design workflows. As a Chip Design Engineer , you'll be the crucial link between our groundbreaking Artificial Chip Intelligence (ACI) solutions and the design teams who will use them. You'll translate complex technical concepts into practical solutions, helping teams successfully adopt our solutions and unleash their creativity. If you thrive on solving technical challenges and empowering others to build the future, this is your stage.\n\n---\n\n**What you'll do**\n\n- Partner with ML and Software teams as a key hardware domain expert, translating complex silicon constraints into actionable insights for model training and agentic design\n- Build and maintain an ecosystem of benchmarks and evaluation infrastructure to measure and improve the quality of our tools\n- Execute and refine novel chip design methodologies, from architectural specs to synthesized netlists to complete bitstreams to identify where AI can optimize the flow\n- Generate and curate massive datasets of syntactic and semantic hardware code to improve model robustness\n- Implement robust verification environments, writing the SystemVerilog\/UVM testbenches and assertions with our tools that ensure our generated designs are correct-by-construction\n- Apply AI to real-world problems. Serve as the primary technical point of contact for customers, providing expert guidance and support to help them integrate Cognichip ACI\u00ae solutions into their design flows.\n\n---\n\n**What You Bring**\n\n- Master's degree in Computer Science, Electrical Engineering, or a closely related field.\n- 5+ years of experience in RTL design, verification, or a combination of both, with a passion for customer-facing roles.\n- Proficiency in Verilog\/SystemVerilog and scripting languages like Python for automation\n- Experience with digital design EDA tools such as AMD (Vivado), Altera\/Intel (Quartus) ecosystems or ASIC physical design chains, including SoC and IP integrations\n- Excellent written and verbal communication skills, with a strong ability to translate complex technical information into clear, actionable guidance.\n- A consultative, problem-solving mindset and a passion for helping others succeed.\n- Comfortable working in a dynamic, research-heavy AI-oriented startup environment\n\n---\n\n**Bonus Points**\n\nThe following items are not required but are great bonuses:\n\n- Personal projects showcasing innovation, creativity, and continuous learning\n- Knowledge of open-source tools and contribution practices (Verilator, CocoTB, Yosys, OpenSTA, etc)\n- Experience with multiple areas of chip flow (RTL design, validation, synthesis, physical design, etc) and with EDA tools and their application in real-world design flows.\n- Demonstrated coursework or project experience in machine learning and\/or deep learning\n- Prior experience in a field application engineering or customer success role.\n\n---\n\n**What it's like here**\n\nWe\u2019re a fast-moving AI startup with a collaborative, high-trust culture. You\u2019ll work alongside top-tier engineers and scientists, but your primary focus will be on our customers\u2014solving their hard problems and ensuring they can build the future of engineering. We value technical excellence, ownership, and the freedom to experiment. If you\u2019re excited to empower a new generation of chip designers, you\u2019ll feel right at home.\n\n---\n\n**Logistics**\n\nThis position is available in Toronto, Ontario. We believe a mindmeld between engineers and scientists leads to our professional growth and to great products. We have a hybrid schedule with four days in office, one day remote.","categories":["R&D"],"employment_type":"FULL_TIME","experience_level":"MID_SENIOR_LEVEL","workplace_type":"Onsite","salary":{"min":184000,"max":222000,"currency":"CAD","period":"YEARLY"}},{"uuid":"300153df-d191-4c97-9824-6c47926c66f5","title":"Staff Software Engineer - Data Pipelines for AI + Chip Design","content":"**Job Title**\n\nStaff Software Engineer - Data Pipelines for AI + Chip Design\n\n**Job Description**\n\n**Staff Software Engineer \u2014 Data Pipelines for AI + Chip Design**\n\n**About the job**\n\n**Why this matters**\n\nAt Cognichip, we\u2019re building at the intersection of hardware, software, and AI. Our platform depends on complex data systems that connect scientific experimentation, chip-design workflows, simulation outputs, model training, and engineering feedback loops. As a Software Engineer focused on Data Pipelines, you\u2019ll help build and evolve the data engine behind our AI-driven semiconductor design platform. This is a high-ownership role for someone who can work across testing, debugging, feature development, infrastructure improvement, and close collaboration with scientists and chip experts. The role is technically demanding, but highly rewarding: you\u2019ll work on systems with many moving parts in a domain where deep engineering skill, speed, and quality all matter.\n\n**What you'll do**\n\n- Own the data-engine reliability loop.\n- Run end-to-end tests, triage failures, diagnose root causes, plan fixes, and verify improvements across the core components of Cognichip\u2019s data engine.\n- Build and evolve data pipelines.\n- Design, develop, test, and improve sophisticated data-processing systems that support AI workflows, chip-design experimentation, and scientific analysis.\n- Drive features from idea to release.\n- Take feature requests from scope and specification through implementation, testing, \n- documentation, and delivery.\n- Create useful operational visibility.\n- Build high-quality dashboards, logs, CLI surfaces, and documentation that help engineers, scientists, and chip experts understand and use the system effectively.\n- Improve infrastructure over time.\n- Proactively reduce errors, improve compute and disk efficiency, address technical debt, and keep the system aligned with real user needs.\n\n**What You Bring**\n\n- Strong software engineering experience building, testing, and maintaining complex systems with many interacting components.\n- Hands-on experience with data pipelines, backend systems, infrastructure tooling, workflow systems, or internal engineering platforms.\n- Ability to debug difficult problems across data, code, infrastructure, and user workflows.\n- Strong coding skills, especially in Python, with good practices around testing, maintainability, and documentation.\n- Experience turning ambiguous requests into scoped plans, implemented features, and reliable releases.\n- Clear communication skills and the ability to work effectively with software engineers, scientists, ML researchers, and chip-design experts.\n- A strong sense of ownership: you identify what needs to improve, execute carefully, and verify that the result works.\n\n**Bonus Points**\n\n- Experience with dashboards, observability systems, experiment tracking, or internal developer tools.\n- Background with ML pipelines, scientific computing, simulation workflows, or large-scale experimental data.\n- Prior exposure to semiconductor design, EDA tools, chip-design workflows, or hardware verification.\n- Experience working directly with researchers, scientists, hardware engineers, or other deeply technical users.","url":null,"created_at":"2026-05-18T21:51:54.000000Z","department":"AI","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nStaff Software Engineer - Data Pipelines for AI + Chip Design\n\n**Job Description**\n\n**Staff Software Engineer \u2014 Data Pipelines for AI + Chip Design**\n\n**About the job**\n\n**Why this matters**\n\nAt Cognichip, we\u2019re building at the intersection of hardware, software, and AI. Our platform depends on complex data systems that connect scientific experimentation, chip-design workflows, simulation outputs, model training, and engineering feedback loops. As a Software Engineer focused on Data Pipelines, you\u2019ll help build and evolve the data engine behind our AI-driven semiconductor design platform. This is a high-ownership role for someone who can work across testing, debugging, feature development, infrastructure improvement, and close collaboration with scientists and chip experts. The role is technically demanding, but highly rewarding: you\u2019ll work on systems with many moving parts in a domain where deep engineering skill, speed, and quality all matter.\n\n**What you'll do**\n\n- Own the data-engine reliability loop.\n- Run end-to-end tests, triage failures, diagnose root causes, plan fixes, and verify improvements across the core components of Cognichip\u2019s data engine.\n- Build and evolve data pipelines.\n- Design, develop, test, and improve sophisticated data-processing systems that support AI workflows, chip-design experimentation, and scientific analysis.\n- Drive features from idea to release.\n- Take feature requests from scope and specification through implementation, testing, \n- documentation, and delivery.\n- Create useful operational visibility.\n- Build high-quality dashboards, logs, CLI surfaces, and documentation that help engineers, scientists, and chip experts understand and use the system effectively.\n- Improve infrastructure over time.\n- Proactively reduce errors, improve compute and disk efficiency, address technical debt, and keep the system aligned with real user needs.\n\n**What You Bring**\n\n- Strong software engineering experience building, testing, and maintaining complex systems with many interacting components.\n- Hands-on experience with data pipelines, backend systems, infrastructure tooling, workflow systems, or internal engineering platforms.\n- Ability to debug difficult problems across data, code, infrastructure, and user workflows.\n- Strong coding skills, especially in Python, with good practices around testing, maintainability, and documentation.\n- Experience turning ambiguous requests into scoped plans, implemented features, and reliable releases.\n- Clear communication skills and the ability to work effectively with software engineers, scientists, ML researchers, and chip-design experts.\n- A strong sense of ownership: you identify what needs to improve, execute carefully, and verify that the result works.\n\n**Bonus Points**\n\n- Experience with dashboards, observability systems, experiment tracking, or internal developer tools.\n- Background with ML pipelines, scientific computing, simulation workflows, or large-scale experimental data.\n- Prior exposure to semiconductor design, EDA tools, chip-design workflows, or hardware verification.\n- Experience working directly with researchers, scientists, hardware engineers, or other deeply technical users.","categories":[],"employment_type":"FULL_TIME","experience_level":"MID_SENIOR_LEVEL","workplace_type":"Onsite","salary":{"min":205000,"max":245000,"currency":"USD","period":"YEARLY"}},{"uuid":"6c53107d-1b6a-40b3-a2a5-3bc742b078f5","title":"Formal Verification Engineer - AI","content":"**Job Title**\n\nFormal Verification Engineer - AI\n\n**About the Role**\n\n- We are looking for exceptional analytical minds to join our verification team. Our work centers on a hard and rewarding problem: mathematically proving that complex systems behave exactly as specified \u2014 no edge cases, no exceptions.\n- You might be an experienced formal methods practitioner, or you might come from pure mathematics, physics, or another rigorous quantitative discipline and be looking to apply your skills to concrete, high-impact engineering problems.\n- If you have a talent for precise reasoning, constructing airtight arguments, and learning new technical domains quickly, we will teach you the rest.\n\n**Key Responsibilities**\n\n- Develop and apply formal verification environments for complex systems.\n- Translate specifications and design documents into rigorous formal properties.\n- Perform property checking, model checking, and automated proof development; debug and root-cause counterexamples.\n- Improve verification coverage, methodology, and reusability across projects.\n- Develop scripts and utilities to support verification productivity.\n\n**Required Qualifications**\n\n- BS, MS, or Ph.D. in Computer Science, Mathematics, Physics, or another rigorous quantitative field.\n- Demonstrated strength in mathematical reasoning \u2014 through formal verification experience, research, competition mathematics, or comparable evidence of rigor.\n- Solid programming skills (e.g., Python, C++) and the drive to rapidly master new tools and domains.\n\n**Preferred Qualifications**\n\n- Hands-on experience with formal verification: model checking, property specification, or automated theorem proving.\n- Experience with interactive theorem provers (e.g., Coq, Lean, Isabelle, ACL2) or SMT solvers (e.g., Z3, CVC5).\n- Experience building verification tooling or contributing to open-source formal methods projects.\n- Background in logic, type theory, discrete mathematics, or mathematical physics.\n\n**What We Offer**\n\n- The chance to work on genuinely hard correctness problems where rigor matters.\n- Mentorship from experienced formal methods engineers and a structured ramp-up into the field.\n- A culture that values depth, precision, and first-principles thinking.","url":null,"created_at":"2026-06-03T03:53:47.000000Z","department":"AI","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nFormal Verification Engineer - AI\n\n**About the Role**\n\n- We are looking for exceptional analytical minds to join our verification team. Our work centers on a hard and rewarding problem: mathematically proving that complex systems behave exactly as specified \u2014 no edge cases, no exceptions.\n- You might be an experienced formal methods practitioner, or you might come from pure mathematics, physics, or another rigorous quantitative discipline and be looking to apply your skills to concrete, high-impact engineering problems.\n- If you have a talent for precise reasoning, constructing airtight arguments, and learning new technical domains quickly, we will teach you the rest.\n\n**Key Responsibilities**\n\n- Develop and apply formal verification environments for complex systems.\n- Translate specifications and design documents into rigorous formal properties.\n- Perform property checking, model checking, and automated proof development; debug and root-cause counterexamples.\n- Improve verification coverage, methodology, and reusability across projects.\n- Develop scripts and utilities to support verification productivity.\n\n**Required Qualifications**\n\n- BS, MS, or Ph.D. in Computer Science, Mathematics, Physics, or another rigorous quantitative field.\n- Demonstrated strength in mathematical reasoning \u2014 through formal verification experience, research, competition mathematics, or comparable evidence of rigor.\n- Solid programming skills (e.g., Python, C++) and the drive to rapidly master new tools and domains.\n\n**Preferred Qualifications**\n\n- Hands-on experience with formal verification: model checking, property specification, or automated theorem proving.\n- Experience with interactive theorem provers (e.g., Coq, Lean, Isabelle, ACL2) or SMT solvers (e.g., Z3, CVC5).\n- Experience building verification tooling or contributing to open-source formal methods projects.\n- Background in logic, type theory, discrete mathematics, or mathematical physics.\n\n**What We Offer**\n\n- The chance to work on genuinely hard correctness problems where rigor matters.\n- Mentorship from experienced formal methods engineers and a structured ramp-up into the field.\n- A culture that values depth, precision, and first-principles thinking.","categories":[],"employment_type":"FULL_TIME","experience_level":"MID_SENIOR_LEVEL","workplace_type":"Onsite","salary":{"min":175000,"max":210000,"currency":"USD","period":"YEARLY"}},{"uuid":"b0329eef-cd3b-47e5-8148-cc69ff36dde9","title":"Sr. Staff AI Engineer, Silicon Design","content":"**Job Title**\n\nSr. Staff AI Engineer, Silicon Design\n\n**Position Overview**\n\nWe are seeking a versatile Sr. Staff AI Engineer to drive the integration of Artificial Intelligence into the semiconductor design lifecycle. In this role, you will bridge the gap between advanced ML research and production-grade hardware engineering, developing specialized foundational language models and cognitive orchestration systems that optimize everything from RTL generation to physical verification. You will be responsible for building practical, scalable AI solutions that provide measurable productivity gains in high-stakes chip design environments.\n\n**Key Responsibilities**\n\n- AI System Development: Design and deploy production-scale generative workflows and context-augmented retrieval mechanisms to automate complex EDA tasks, including IP configuration and RTL generation.\n- Model Optimization: Architect and fine-tune foundation models (LLMs\/SLMs) and other deep learning architectures to enhance the silicon design process.\n- Reinforcement Learning: Implement Reinforcement Learning (RL) environments and policy-gradient methods to guide non-linear optimization routines across automated cell-sizing and routing passes.\n- End-to-End Flow Integration: Collaborate with R&D and IP teams to embed AI-driven assistants directly into existing digital and analog design flows.\n- Scalable Engineering: Build robust, cloud-native training pipelines using Kubernetes and Docker to handle large-scale EDA datasets.\n- Technical Leadership: Lead the transition of AI prototypes into reliable tools, ensuring high performance, maintainability, and scalability for thousands of internal users.\n\n**Required Qualifications**\n\n- Education: M.S. or higher in Electrical Engineering, Computer Science, or a related field with a focus on AI\/ML or VLSI.\n- Professional Experience: 7+ years of experience in the semiconductor or EDA industry, with a proven track record of deploying AI\/ML models in a production capacity.\n- Broad EDA Knowledge: Hands-on experience across the full silicon lifecycle (RTL-to-GDS), with specific exposure to Physical Design, Place-and-Route, and Physical Verification (DRC\/LVS).\n- Software Proficiency: Strong programming skills in Python, C++, and SystemVerilog, along with experience in scripting (Tcl, Shell).\n- Machine Learning Stack: Proficiency in PyTorch or TensorFlow, and experience with state-of-the-art framework orchestration, custom inference optimization tools, and model evaluation harnesses.\n\n**Preferred Qualifications & Skills**\n\n- Advanced Education: Ph.D. with research specifically focused on AI\/ML for EDA and metric modeling.\n- Practical Chip Design: Extensive experience with advanced technology nodes (7nm, 5nm, 3nm, or below) and physical verification toolsets (e.g., IC Validator, Calibre).\n- Specialized ML: Demonstrated experience in Multi-objective Optimization, Transfer Learning, and the application of machine learning architectures to hardware problems.\n- Systems Engineering: Deep expertise in operationalizing GenAI platforms on distributed, multi-GPU cloud environments.\n- Hardware Acceleration: Background in optimizing algorithms for FPGA or SoC deployment and hardware-efficient ML implementation.","url":null,"created_at":"2026-06-03T03:54:40.000000Z","department":"AI","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nSr. Staff AI Engineer, Silicon Design\n\n**Position Overview**\n\nWe are seeking a versatile Sr. Staff AI Engineer to drive the integration of Artificial Intelligence into the semiconductor design lifecycle. In this role, you will bridge the gap between advanced ML research and production-grade hardware engineering, developing specialized foundational language models and cognitive orchestration systems that optimize everything from RTL generation to physical verification. You will be responsible for building practical, scalable AI solutions that provide measurable productivity gains in high-stakes chip design environments.\n\n**Key Responsibilities**\n\n- AI System Development: Design and deploy production-scale generative workflows and context-augmented retrieval mechanisms to automate complex EDA tasks, including IP configuration and RTL generation.\n- Model Optimization: Architect and fine-tune foundation models (LLMs\/SLMs) and other deep learning architectures to enhance the silicon design process.\n- Reinforcement Learning: Implement Reinforcement Learning (RL) environments and policy-gradient methods to guide non-linear optimization routines across automated cell-sizing and routing passes.\n- End-to-End Flow Integration: Collaborate with R&D and IP teams to embed AI-driven assistants directly into existing digital and analog design flows.\n- Scalable Engineering: Build robust, cloud-native training pipelines using Kubernetes and Docker to handle large-scale EDA datasets.\n- Technical Leadership: Lead the transition of AI prototypes into reliable tools, ensuring high performance, maintainability, and scalability for thousands of internal users.\n\n**Required Qualifications**\n\n- Education: M.S. or higher in Electrical Engineering, Computer Science, or a related field with a focus on AI\/ML or VLSI.\n- Professional Experience: 7+ years of experience in the semiconductor or EDA industry, with a proven track record of deploying AI\/ML models in a production capacity.\n- Broad EDA Knowledge: Hands-on experience across the full silicon lifecycle (RTL-to-GDS), with specific exposure to Physical Design, Place-and-Route, and Physical Verification (DRC\/LVS).\n- Software Proficiency: Strong programming skills in Python, C++, and SystemVerilog, along with experience in scripting (Tcl, Shell).\n- Machine Learning Stack: Proficiency in PyTorch or TensorFlow, and experience with state-of-the-art framework orchestration, custom inference optimization tools, and model evaluation harnesses.\n\n**Preferred Qualifications & Skills**\n\n- Advanced Education: Ph.D. with research specifically focused on AI\/ML for EDA and metric modeling.\n- Practical Chip Design: Extensive experience with advanced technology nodes (7nm, 5nm, 3nm, or below) and physical verification toolsets (e.g., IC Validator, Calibre).\n- Specialized ML: Demonstrated experience in Multi-objective Optimization, Transfer Learning, and the application of machine learning architectures to hardware problems.\n- Systems Engineering: Deep expertise in operationalizing GenAI platforms on distributed, multi-GPU cloud environments.\n- Hardware Acceleration: Background in optimizing algorithms for FPGA or SoC deployment and hardware-efficient ML implementation.","categories":[],"employment_type":"FULL_TIME","experience_level":"DIRECTOR","workplace_type":"Onsite","salary":{"min":240000,"max":285000,"currency":"USD","period":"YEARLY"}},{"uuid":"0015b446-2867-41fd-8509-c0e80da89e1f","title":"Staff AI Solution Engineer - FPGA","content":"**Job Title**\n\nStaff AI Solution Engineer - FPGA\n\n**Job Summary**\n\nAt Cognichip, we're not just building AI; we're enabling our customers to harness the power of AI to transform their silicon design workflows. As an AI Application Engineer with an FPGA focus, you'll be the crucial link between our groundbreaking Artificial Chip Intelligence (ACI) solutions and the hardware design teams who will use them to target high-performance FPGA platforms. You'll translate complex technical concepts into practical solutions, helping teams successfully adopt our solutions and unleash their creativity on programmable logic. If you thrive on solving technical challenges and empowering others to build the future of accelerated computing, this is your stage.\n\n**Key Responsibilities**\n\n- Apply AI to real-world problems. Serve as the primary technical point of contact for customers, providing expert guidance and support to help them integrate Cognichip ACI\u00ae solutions into their FPGA-based design flows and hardware acceleration pipelines.\n- Bridge the gap. Collaborate closely with customer design teams, providing hands-on support for RTL development, optimization, and hardware troubleshooting to ensure a seamless experience when going from innovative idea to reconfigurable chips. You\u2019ll also act as the voice of the customer, relaying critical feedback to our AI science and software teams.\n- Drive adoption and success. Develop and deliver technical presentations, hardware demonstrations, and training sessions that showcase the value and capabilities of ACI for the FPGA hardware and software ecosystems.\n- Diagnose and solve. Dive deep into customer-specific issues\u2014analyzing design flows, log files, and user interactions - to diagnose problems, provide solutions, and help improve our products and services.\n- Educate and inform. Create clear, concise technical documentation, application notes, and reference designs for FPGA implementation to empower our customers and accelerate their learning curve.\n\n**Required Qualifications**\n\n- Master's degree in Electrical Engineering, or a closely related field.\n- 7 to 10 years of experience in FPGA-based RTL design, verification, and optimization, with a passion for customer-facing roles.\n- Proficiency in Verilog\/SystemVerilog, FPGA toolchains (AMD\/Altera), and scripting languages like Python.\n- Excellent written and verbal communication skills, with a strong ability to translate complex technical information into clear, actionable guidance.\n- A consultative, problem-solving mindset and a passion for helping others succeed.\n- Demonstrated knowledge of the full FPGA design process, from RTL to synthesis and timing closure.\n- Experience with machine learning or deep learning concepts is a strong advantage.","url":null,"created_at":"2026-06-03T03:54:51.000000Z","department":"Product Marketing","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nStaff AI Solution Engineer - FPGA\n\n**Job Summary**\n\nAt Cognichip, we're not just building AI; we're enabling our customers to harness the power of AI to transform their silicon design workflows. As an AI Application Engineer with an FPGA focus, you'll be the crucial link between our groundbreaking Artificial Chip Intelligence (ACI) solutions and the hardware design teams who will use them to target high-performance FPGA platforms. You'll translate complex technical concepts into practical solutions, helping teams successfully adopt our solutions and unleash their creativity on programmable logic. If you thrive on solving technical challenges and empowering others to build the future of accelerated computing, this is your stage.\n\n**Key Responsibilities**\n\n- Apply AI to real-world problems. Serve as the primary technical point of contact for customers, providing expert guidance and support to help them integrate Cognichip ACI\u00ae solutions into their FPGA-based design flows and hardware acceleration pipelines.\n- Bridge the gap. Collaborate closely with customer design teams, providing hands-on support for RTL development, optimization, and hardware troubleshooting to ensure a seamless experience when going from innovative idea to reconfigurable chips. You\u2019ll also act as the voice of the customer, relaying critical feedback to our AI science and software teams.\n- Drive adoption and success. Develop and deliver technical presentations, hardware demonstrations, and training sessions that showcase the value and capabilities of ACI for the FPGA hardware and software ecosystems.\n- Diagnose and solve. Dive deep into customer-specific issues\u2014analyzing design flows, log files, and user interactions - to diagnose problems, provide solutions, and help improve our products and services.\n- Educate and inform. Create clear, concise technical documentation, application notes, and reference designs for FPGA implementation to empower our customers and accelerate their learning curve.\n\n**Required Qualifications**\n\n- Master's degree in Electrical Engineering, or a closely related field.\n- 7 to 10 years of experience in FPGA-based RTL design, verification, and optimization, with a passion for customer-facing roles.\n- Proficiency in Verilog\/SystemVerilog, FPGA toolchains (AMD\/Altera), and scripting languages like Python.\n- Excellent written and verbal communication skills, with a strong ability to translate complex technical information into clear, actionable guidance.\n- A consultative, problem-solving mindset and a passion for helping others succeed.\n- Demonstrated knowledge of the full FPGA design process, from RTL to synthesis and timing closure.\n- Experience with machine learning or deep learning concepts is a strong advantage.","categories":["Sales & Field"],"employment_type":"FULL_TIME","experience_level":"MID_SENIOR_LEVEL","workplace_type":"Onsite","salary":{"min":175000,"max":210000,"currency":"USD","period":"YEARLY"}},{"uuid":"a4162cc7-245b-4342-b4e5-2bb476ed7e87","title":"Principal ASIC Design Engineer","content":"**Job Title**\n\nPrincipal ASIC Design Engineer\n\n**About Us**\n\nAt Cognichip, we are building the next-generation AI-enabled solutions to empower semiconductor design engineers with a 10x productivity boost through specialized generative models, agentic workflows and seamless integration with high-performance EDA engines.\n\n**Role Overview**\n\nWe are seeking a Principal ASIC Design Engineer at the intersection of silicon design and artificial intelligence. This senior IC role focuses on re-imagining chip design flows with an AI-first mindset, and charting the path to incorporate enterprise and know-how into intelligent systems forAI-native production-quality chip design and verification. The ideal candidate combines deep silicon expertise, microarchitecture, RTL, DV, and EDA workflows, into structured AI-driven and tool-aware processes.\n\n**Key Responsibilities**\n\n- Translate chip-design expertise (RTL\/DV best practices, micro-architectural patterns, failure modes) into reusable, AI-consumable knowledge bases and agent playbooks.\n- Identify bottlenecks in advanced chip design process and devise novel models, tools, and to rethink workflows to drastically change the outcome\n- Define EDA tool usage strategies and wrappers for AI-native workflows\n- Define evaluation strategies suitable for AI systems to enhance performance and grounding\n\n**Required Qualifications**\n\n- 15+ years of hands-on experience in Chip Design and Physical Design.\n- Proven expertise in Digital IC, ASIC, or SoC design; strong proficiency in SystemVerilog RTL and STA.\n- Solid understanding of microarchitecture concepts: pipelines, FIFOs, DMA engines, caches, and on-chip interconnects.\n- Deep familiarity with the full design cycle: lint, CDC\/RDC, functional simulation, and STA.\n- Ability to articulate design tradeoffs and debug complex RTL issues.\n- Proficiency in Python; experience integrating tools into automated workflows.\n\n**Preferred Qualifications**\n\n- Demonstrated experience with AI\/ML systems (of any kind), prompt and context engineering\n- Ability to translate complex silicon design problems into structured, executable and verifiable components in agent workflows.\n- Experience with AI-assisted EDA tools or ML\/chip design research.\n- Contributions to open-source chip design, EDA tooling, or AI\/ML infrastructure.\n\n**What We Offer**\n\n- A foundational role in how AI transforms chip design.\n- A collaborative environment where deep silicon expertise meets cutting-edge AI research.\n- Competitive compensation, equity, and benefits.\n- Flexible work with access to world-class compute and EDA infrastructure.\n\nWe are an equal opportunity employer committed to building a diverse and inclusive team.","url":null,"created_at":"2026-06-15T22:37:15.000000Z","department":"Engineering","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nPrincipal ASIC Design Engineer\n\n**About Us**\n\nAt Cognichip, we are building the next-generation AI-enabled solutions to empower semiconductor design engineers with a 10x productivity boost through specialized generative models, agentic workflows and seamless integration with high-performance EDA engines.\n\n**Role Overview**\n\nWe are seeking a Principal ASIC Design Engineer at the intersection of silicon design and artificial intelligence. This senior IC role focuses on re-imagining chip design flows with an AI-first mindset, and charting the path to incorporate enterprise and know-how into intelligent systems forAI-native production-quality chip design and verification. The ideal candidate combines deep silicon expertise, microarchitecture, RTL, DV, and EDA workflows, into structured AI-driven and tool-aware processes.\n\n**Key Responsibilities**\n\n- Translate chip-design expertise (RTL\/DV best practices, micro-architectural patterns, failure modes) into reusable, AI-consumable knowledge bases and agent playbooks.\n- Identify bottlenecks in advanced chip design process and devise novel models, tools, and to rethink workflows to drastically change the outcome\n- Define EDA tool usage strategies and wrappers for AI-native workflows\n- Define evaluation strategies suitable for AI systems to enhance performance and grounding\n\n**Required Qualifications**\n\n- 15+ years of hands-on experience in Chip Design and Physical Design.\n- Proven expertise in Digital IC, ASIC, or SoC design; strong proficiency in SystemVerilog RTL and STA.\n- Solid understanding of microarchitecture concepts: pipelines, FIFOs, DMA engines, caches, and on-chip interconnects.\n- Deep familiarity with the full design cycle: lint, CDC\/RDC, functional simulation, and STA.\n- Ability to articulate design tradeoffs and debug complex RTL issues.\n- Proficiency in Python; experience integrating tools into automated workflows.\n\n**Preferred Qualifications**\n\n- Demonstrated experience with AI\/ML systems (of any kind), prompt and context engineering\n- Ability to translate complex silicon design problems into structured, executable and verifiable components in agent workflows.\n- Experience with AI-assisted EDA tools or ML\/chip design research.\n- Contributions to open-source chip design, EDA tooling, or AI\/ML infrastructure.\n\n**What We Offer**\n\n- A foundational role in how AI transforms chip design.\n- A collaborative environment where deep silicon expertise meets cutting-edge AI research.\n- Competitive compensation, equity, and benefits.\n- Flexible work with access to world-class compute and EDA infrastructure.\n\nWe are an equal opportunity employer committed to building a diverse and inclusive team.","categories":[],"employment_type":"FULL_TIME","experience_level":"DIRECTOR","workplace_type":"Onsite","salary":{"min":285000,"max":330000,"currency":"USD","period":"YEARLY"}},{"uuid":"d1179936-767f-4d06-aaac-bb1d85f99f4d","title":"Senior ASIC Design Manager","content":"**Job Title**\n\nSenior ASIC Design Manager\n\n**About Us**\n\n- At Cognichip, we are building the next-generation AI-enabled solutions to empower semiconductor design engineers with a 10x productivity boost through specialized generative models, agentic workflows, and seamless integration with high-performance EDA engines.\n\n**Role Overview**\n\n- We are seeking a Senior ASIC Manager to lead a high-performing engineering team at the intersection of silicon design and artificial intelligence. In this role, you will bridge the gap between deep hardware expertise and cutting-edge AI, managing a team focused on re-imagining chip design flows with an AI-first mindset.\n- You will be responsible for charting the path to incorporate enterprise silicon know-how into intelligent systems for AI-native, production-quality chip design and verification, while directly mentoring engineers and scaling our Toronto footprint.\n\n**Key Responsibilities**\n\n**Team Leadership & Growth:**\n\n- Lead, mentor, and scale a highly technical team of ASIC design and verification engineers.\n- Foster a collaborative environment where deep silicon expertise meets cutting-edge AI research.\n\n**Innovation & Bottleneck Resolution:**\n\n- Guide the team in identifying bottlenecks in advanced chip design processes and devising AI models, tools, and workflows to drastically improve engineering outcomes.\n\n**Execution & Delivery:**\n\n- Define execution and delivery, ensuring project milestones are met with production-quality execution.\n\n**Required Qualifications**\n\n- Experience: 15+ years of experience in a mix of individual contributor roles and leading highly technical teams.\n- Proven Management Track Record: Demonstrated experience managing engineering teams, executing performance reviews, and steering technical roadmaps.\n- Silicon Expertise: Extensive hands-on experience in Digital IC, ASIC, or SoC design, with strong proficiency in SystemVerilog RTL and STA.\n- Microarchitecture: Solid understanding of advanced concepts including pipelines, FIFOs, DMA engines, caches, and on-chip interconnects, networking.\n- Full-Cycle Familiarity: Deep familiarity with the full design cycle (lint, CDC\/RDC, functional simulation, and STA) and the ability to guide engineers through complex RTL design tradeoffs.\n- Software Literacy: Proficiency in Python and experience integrating EDA tools into automated workflows.\n- Local Presence: Must be located in or willing to relocate to the Greater Toronto Area.\n\n**Preferred Qualifications**\n\n- AI\/ML Exposure: Demonstrated experience with AI\/ML systems, prompt engineering, context engineering, or managing teams working on AI-assisted tool flows.\n- Community Engagement: Contributions to open-source chip design, EDA tooling, or AI\/ML infrastructure.\n\n**What We Offer**\n\n- A foundational leadership role shaping how AI transforms the semiconductor industry.\n- A collaborative environment combining deep hardware expertise with generative AI innovation.\n- Competitive compensation, equity, and comprehensive benefits.\n\n- We are an equal opportunity employer committed to building a diverse and inclusive team.","url":null,"created_at":"2026-06-15T22:37:21.000000Z","department":"Hardware Eng","job_type":null,"location":"\ud83c\udde8\ud83c\udde6 Toronto","description":"**Job Title**\n\nSenior ASIC Design Manager\n\n**About Us**\n\n- At Cognichip, we are building the next-generation AI-enabled solutions to empower semiconductor design engineers with a 10x productivity boost through specialized generative models, agentic workflows, and seamless integration with high-performance EDA engines.\n\n**Role Overview**\n\n- We are seeking a Senior ASIC Manager to lead a high-performing engineering team at the intersection of silicon design and artificial intelligence. In this role, you will bridge the gap between deep hardware expertise and cutting-edge AI, managing a team focused on re-imagining chip design flows with an AI-first mindset.\n- You will be responsible for charting the path to incorporate enterprise silicon know-how into intelligent systems for AI-native, production-quality chip design and verification, while directly mentoring engineers and scaling our Toronto footprint.\n\n**Key Responsibilities**\n\n**Team Leadership & Growth:**\n\n- Lead, mentor, and scale a highly technical team of ASIC design and verification engineers.\n- Foster a collaborative environment where deep silicon expertise meets cutting-edge AI research.\n\n**Innovation & Bottleneck Resolution:**\n\n- Guide the team in identifying bottlenecks in advanced chip design processes and devising AI models, tools, and workflows to drastically improve engineering outcomes.\n\n**Execution & Delivery:**\n\n- Define execution and delivery, ensuring project milestones are met with production-quality execution.\n\n**Required Qualifications**\n\n- Experience: 15+ years of experience in a mix of individual contributor roles and leading highly technical teams.\n- Proven Management Track Record: Demonstrated experience managing engineering teams, executing performance reviews, and steering technical roadmaps.\n- Silicon Expertise: Extensive hands-on experience in Digital IC, ASIC, or SoC design, with strong proficiency in SystemVerilog RTL and STA.\n- Microarchitecture: Solid understanding of advanced concepts including pipelines, FIFOs, DMA engines, caches, and on-chip interconnects, networking.\n- Full-Cycle Familiarity: Deep familiarity with the full design cycle (lint, CDC\/RDC, functional simulation, and STA) and the ability to guide engineers through complex RTL design tradeoffs.\n- Software Literacy: Proficiency in Python and experience integrating EDA tools into automated workflows.\n- Local Presence: Must be located in or willing to relocate to the Greater Toronto Area.\n\n**Preferred Qualifications**\n\n- AI\/ML Exposure: Demonstrated experience with AI\/ML systems, prompt engineering, context engineering, or managing teams working on AI-assisted tool flows.\n- Community Engagement: Contributions to open-source chip design, EDA tooling, or AI\/ML infrastructure.\n\n**What We Offer**\n\n- A foundational leadership role shaping how AI transforms the semiconductor industry.\n- A collaborative environment combining deep hardware expertise with generative AI innovation.\n- Competitive compensation, equity, and comprehensive benefits.\n\n- We are an equal opportunity employer committed to building a diverse and inclusive team.","categories":[],"employment_type":"FULL_TIME","experience_level":"DIRECTOR","workplace_type":"Onsite","salary":{"min":232000,"max":277000,"currency":"CAD","period":"YEARLY"}},{"uuid":"1d782753-fa41-45f9-8799-ac8a46ffa856","title":"Staff Product Manager","content":"**Job Title**\n\nStaff Product Manager\n\n**Staff Product Manager**\n\n**Why this matters**\n\nAI is sparking a generational shift in semiconductor design, and visionary product leadership is at the heart of this evolution. At Cognichip, you won\u2019t just prioritize features; you\u2019ll shape how world-class engineers and scientists apply AI technology to accelerate silicon innovations to global markets. This is a generational opportunity to define products that sit at the intersection of deep tech and real-world impact for one of the world\u2019s most impactful industries.\n\n**Who you are**\n\nYou are an experienced professional at the intersection of AI, semiconductors, and product management. You are a dynamic, self-motivated leader who can navigate complex go-to- market challenges with ease. You're passionate about AI and its potential to drive innovation. You are a collaborative influencer who thrives in cross-functional teams and unstructured environments. Communication comes naturally to you and engaging your audience is effortless.\n\n**What you'll do**\n\n- Define & Deliver Roadmaps: Drive the end-to-end product lifecycle for complex AI features. Translate high-level strategic direction into detailed roadmaps, prioritize features based on impact and feasibility, and collaborate closely with engineering and applied science teams to ensure timely and high-quality delivery of AI-driven solutions.\n- Establish & Analyze Metrics for Success: Define and rigorously track key performance indicators (KPIs) to measure the success and impact of AI-powered features and products. Conduct in-depth data analysis to identify areas for improvement, inform future product decisions, and communicate performance insights to product management executives and other stakeholders.\n- Lead Across Functions: Work closely with engineering, applied science, design, UI\/UX, and go-to-market teams to ensure alignment and effective execution of product plans. Act as the central information hub and key point of contact for entire product areas, influencing cross-functional teams to achieve go-to-market success.\n- Drive Strategic Initiatives: Lead the definition and execution of significant product initiatives aligned with the company's vision and strategic goals. Conduct in-depth market research, competitive analysis, and customer discovery to identify key opportunities and inform high-level product strategy for our AI products.\n- Champion AI Innovation: Stay at the forefront of AI\/ML advancements and best practices, proactively identifying opportunities to leverage new technologies and methodologies within Cognichip\u2019s products. Drive internal AI product guidelines and advocate for ethical and responsible AI development practices.\n\n**What You Bring**\n\n- Masters in Computer Science, Electrical Engineering, or a closely related field\n- 7+ years experience as a Product Manager leading product planning, requirement definition, go-to-market execution, and lifecycle management in the broader semiconductor or EDA space\n- Strong Technical Acumen: A solid understanding of fundamental AI\/ML concepts, algorithms, and the data science lifecycle. While deep coding expertise isn't required, a grasp of the underlying technology is crucial.\n- Proficiency in analyzing data, defining relevant metrics, and drawing actionable insights to inform product decisions. Experience with data visualization tools and techniques.\n- Proven track record in go-to-market for cloud-based software products\n- Deep understanding of the semiconductor ecosystem, development methodologies, and design workflows\n- A passion for storytelling and communication; ability to distill complex technical ideas into clear narratives for both technical and non-technical audiences\n\n**Bonus Points**\n\nThe following items are not required but are great bonuses:\n\n- Experience managing cloud-based AI products and services\n- Prior experience in physics-informed neural networks, scientific simulations, or logic- based learning\n- Hands-on experience with silicon IP products and ecosystems\n- Experience building and engaging online technical communities or managing developer relations programs\n\n**What it's like here**\n\nWe\u2019re a rapidly growing, VC-backed startup where \u201craw talent and collaborative spirit over ego\u201d isn\u2019t just a motto-it\u2019s how we work every day. You\u2019ll be surrounded by teammates who have built companies from zero to IPO, led teams at Google and Amazon, and earned medals in international science Olympiads. We value relentless curiosity, humble problem-solving, and a bias toward action.\n\n**Logistics**\n\n- Redwood Shores, CA (U.S.)\n- Schedule: four days in our gorgeous office, one day remote\n\nDon\u2019t meet every single requirement? Feel over-qualified? That\u2019s okay - if you're excited about our mission, we\u2019d still love to hear from you. We are growing fast and need a world class team of various experience levels.","url":null,"created_at":"2026-07-07T18:47:52.000000Z","department":"Product Marketing","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nStaff Product Manager\n\n**Staff Product Manager**\n\n**Why this matters**\n\nAI is sparking a generational shift in semiconductor design, and visionary product leadership is at the heart of this evolution. At Cognichip, you won\u2019t just prioritize features; you\u2019ll shape how world-class engineers and scientists apply AI technology to accelerate silicon innovations to global markets. This is a generational opportunity to define products that sit at the intersection of deep tech and real-world impact for one of the world\u2019s most impactful industries.\n\n**Who you are**\n\nYou are an experienced professional at the intersection of AI, semiconductors, and product management. You are a dynamic, self-motivated leader who can navigate complex go-to- market challenges with ease. You're passionate about AI and its potential to drive innovation. You are a collaborative influencer who thrives in cross-functional teams and unstructured environments. Communication comes naturally to you and engaging your audience is effortless.\n\n**What you'll do**\n\n- Define & Deliver Roadmaps: Drive the end-to-end product lifecycle for complex AI features. Translate high-level strategic direction into detailed roadmaps, prioritize features based on impact and feasibility, and collaborate closely with engineering and applied science teams to ensure timely and high-quality delivery of AI-driven solutions.\n- Establish & Analyze Metrics for Success: Define and rigorously track key performance indicators (KPIs) to measure the success and impact of AI-powered features and products. Conduct in-depth data analysis to identify areas for improvement, inform future product decisions, and communicate performance insights to product management executives and other stakeholders.\n- Lead Across Functions: Work closely with engineering, applied science, design, UI\/UX, and go-to-market teams to ensure alignment and effective execution of product plans. Act as the central information hub and key point of contact for entire product areas, influencing cross-functional teams to achieve go-to-market success.\n- Drive Strategic Initiatives: Lead the definition and execution of significant product initiatives aligned with the company's vision and strategic goals. Conduct in-depth market research, competitive analysis, and customer discovery to identify key opportunities and inform high-level product strategy for our AI products.\n- Champion AI Innovation: Stay at the forefront of AI\/ML advancements and best practices, proactively identifying opportunities to leverage new technologies and methodologies within Cognichip\u2019s products. Drive internal AI product guidelines and advocate for ethical and responsible AI development practices.\n\n**What You Bring**\n\n- Masters in Computer Science, Electrical Engineering, or a closely related field\n- 7+ years experience as a Product Manager leading product planning, requirement definition, go-to-market execution, and lifecycle management in the broader semiconductor or EDA space\n- Strong Technical Acumen: A solid understanding of fundamental AI\/ML concepts, algorithms, and the data science lifecycle. While deep coding expertise isn't required, a grasp of the underlying technology is crucial.\n- Proficiency in analyzing data, defining relevant metrics, and drawing actionable insights to inform product decisions. Experience with data visualization tools and techniques.\n- Proven track record in go-to-market for cloud-based software products\n- Deep understanding of the semiconductor ecosystem, development methodologies, and design workflows\n- A passion for storytelling and communication; ability to distill complex technical ideas into clear narratives for both technical and non-technical audiences\n\n**Bonus Points**\n\nThe following items are not required but are great bonuses:\n\n- Experience managing cloud-based AI products and services\n- Prior experience in physics-informed neural networks, scientific simulations, or logic- based learning\n- Hands-on experience with silicon IP products and ecosystems\n- Experience building and engaging online technical communities or managing developer relations programs\n\n**What it's like here**\n\nWe\u2019re a rapidly growing, VC-backed startup where \u201craw talent and collaborative spirit over ego\u201d isn\u2019t just a motto-it\u2019s how we work every day. You\u2019ll be surrounded by teammates who have built companies from zero to IPO, led teams at Google and Amazon, and earned medals in international science Olympiads. We value relentless curiosity, humble problem-solving, and a bias toward action.\n\n**Logistics**\n\n- Redwood Shores, CA (U.S.)\n- Schedule: four days in our gorgeous office, one day remote\n\nDon\u2019t meet every single requirement? Feel over-qualified? That\u2019s okay - if you're excited about our mission, we\u2019d still love to hear from you. We are growing fast and need a world class team of various experience levels.","categories":["Product & Marketing"],"employment_type":"FULL_TIME","experience_level":"MID_SENIOR_LEVEL","workplace_type":"Onsite","salary":{"min":195000,"max":235000,"currency":"USD","period":"YEARLY"}},{"uuid":"f5c36330-d54e-489b-a35c-4dbd6a3910db","title":"Senior AI Technical Program Manager","content":"**Job Title**\n\nSenior AI Technical Program Manager\n\n**Senior AI Technical Program Manager Join Cognichip.ai, an innovative AI software company at the forefront of transforming the semiconductor industry. As a Program Management Leader, you will play a crucial role in bringing our groundbreaking cloud-based solutions to life, directly impacting the future of AI and semiconductor design. Your leadership will be instrumental in bridging complex technical challenges with strategic business objectives, ensuring the successful delivery of products that push the boundaries of what's possible.**\n\n**Who you are**\n\n- You are a highly accomplished and strategic Program Management Leader with a deep passion for cutting-edge AI and a proven track record in the semiconductor space.\n- You possess a strong technical foundation, evidenced by a university degree in EE, CE, Information Systems, or relative field, and have consistently delivered complex cloud-based SaaS platforms.\n- You are a natural leader who thrives in dynamic environments, capable of inspiring cross-functional teams and navigating intricate project landscapes with clarity and precision.\n- Your ability to anticipate challenges, mitigate risks, and drive continuous improvement will be key to our success.\n\n**What you'll do**\n\n- Lead and manage the entire lifecycle of multiple, simultaneous AI software development programs, from initial concept through deployment and ongoing optimization.\n- Define clear program scope, objectives, and deliverables, ensuring robust alignment with strategic business goals and market needs.\n- Develop and execute comprehensive program plans, meticulously detailing timelines, resource allocation, budget, and proactive risk mitigation strategies.\n- Oversee and empower cross-functional teams, fostering seamless collaboration and ensuring effective communication among engineering, product, research, and other critical stakeholders.\n- Implement and continuously optimize program management processes, methodologies (e.g., Agile), and tools to enhance efficiency, predictability, and overall program health.\n- Rigorously monitor program progress, identify potential roadblocks, and swiftly implement solutions to maintain momentum and ensure programs remain on schedule.\n- Communicate program status, potential risks, and interdependencies with exceptional clarity to executive leadership and all relevant stakeholders.\n- Drive a culture of continuous improvement in product delivery, quality, and operational excellence across all programs.\n- Mentor and develop a high-performing team of program managers, fostering their growth and professional development.\n\n**What You Bring**\n\n- Bachelor degree in EE, CS or related technical field such as Data Science or Information Systems.\n- Minimum of 5 of progressive experience in program management within the software industry, with a strong emphasis on Artificial Intelligence (AI) and Machine Learning (ML) applications.\n- Demonstrated and extensive track record of successfully delivering multiple cloud-based Software-as-a-Service (SaaS) platforms from inception to widespread market adoption.\n- Profound understanding of agile development methodologies (e.g., Scrum, Kanban) and a history of their practical and successful application.\n- Exceptional leadership, communication, and interpersonal skills, with a proven ability to influence, motivate, and inspire diverse teams towards common goals.\n- Strong analytical acumen and superior problem-solving abilities, capable of dissecting and navigating highly complex technical and business challenges.\n- Proven ability to effectively manage multiple competing priorities and demanding programs in a fast-paced, highly dynamic environment.\n- Semiconductor & Chip Design background or working knowledge.\n\n**Bonus Points**\n\n- Masters degree and experience in the semiconductor industry.\n- Experience with large-scale data platforms and distributed systems.\n- Prior experience in a startup or fast-growing technology company.\n- Certifications in program or project management (e.g., PMP, PgMP).","url":null,"created_at":"2026-07-15T20:23:05.000000Z","department":"Product Marketing","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nSenior AI Technical Program Manager\n\n**Senior AI Technical Program Manager Join Cognichip.ai, an innovative AI software company at the forefront of transforming the semiconductor industry. As a Program Management Leader, you will play a crucial role in bringing our groundbreaking cloud-based solutions to life, directly impacting the future of AI and semiconductor design. Your leadership will be instrumental in bridging complex technical challenges with strategic business objectives, ensuring the successful delivery of products that push the boundaries of what's possible.**\n\n**Who you are**\n\n- You are a highly accomplished and strategic Program Management Leader with a deep passion for cutting-edge AI and a proven track record in the semiconductor space.\n- You possess a strong technical foundation, evidenced by a university degree in EE, CE, Information Systems, or relative field, and have consistently delivered complex cloud-based SaaS platforms.\n- You are a natural leader who thrives in dynamic environments, capable of inspiring cross-functional teams and navigating intricate project landscapes with clarity and precision.\n- Your ability to anticipate challenges, mitigate risks, and drive continuous improvement will be key to our success.\n\n**What you'll do**\n\n- Lead and manage the entire lifecycle of multiple, simultaneous AI software development programs, from initial concept through deployment and ongoing optimization.\n- Define clear program scope, objectives, and deliverables, ensuring robust alignment with strategic business goals and market needs.\n- Develop and execute comprehensive program plans, meticulously detailing timelines, resource allocation, budget, and proactive risk mitigation strategies.\n- Oversee and empower cross-functional teams, fostering seamless collaboration and ensuring effective communication among engineering, product, research, and other critical stakeholders.\n- Implement and continuously optimize program management processes, methodologies (e.g., Agile), and tools to enhance efficiency, predictability, and overall program health.\n- Rigorously monitor program progress, identify potential roadblocks, and swiftly implement solutions to maintain momentum and ensure programs remain on schedule.\n- Communicate program status, potential risks, and interdependencies with exceptional clarity to executive leadership and all relevant stakeholders.\n- Drive a culture of continuous improvement in product delivery, quality, and operational excellence across all programs.\n- Mentor and develop a high-performing team of program managers, fostering their growth and professional development.\n\n**What You Bring**\n\n- Bachelor degree in EE, CS or related technical field such as Data Science or Information Systems.\n- Minimum of 5 of progressive experience in program management within the software industry, with a strong emphasis on Artificial Intelligence (AI) and Machine Learning (ML) applications.\n- Demonstrated and extensive track record of successfully delivering multiple cloud-based Software-as-a-Service (SaaS) platforms from inception to widespread market adoption.\n- Profound understanding of agile development methodologies (e.g., Scrum, Kanban) and a history of their practical and successful application.\n- Exceptional leadership, communication, and interpersonal skills, with a proven ability to influence, motivate, and inspire diverse teams towards common goals.\n- Strong analytical acumen and superior problem-solving abilities, capable of dissecting and navigating highly complex technical and business challenges.\n- Proven ability to effectively manage multiple competing priorities and demanding programs in a fast-paced, highly dynamic environment.\n- Semiconductor & Chip Design background or working knowledge.\n\n**Bonus Points**\n\n- Masters degree and experience in the semiconductor industry.\n- Experience with large-scale data platforms and distributed systems.\n- Prior experience in a startup or fast-growing technology company.\n- Certifications in program or project management (e.g., PMP, PgMP).","categories":[],"employment_type":"FULL_TIME","experience_level":"MID_SENIOR_LEVEL","workplace_type":"Onsite","salary":{"min":175000,"max":200000,"currency":"USD","period":"YEARLY"}},{"uuid":"7bf2e53e-6901-487b-9171-cfda185a4c02","title":"Staff CAD\/EDA Tools Engineer","content":"**Job Title**\n\nStaff CAD\/EDA Tools Engineer\n\n**About Cognichip**\n\nAt Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips. Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world's most complex engineering disciplines.\n\n**About the Role**\n\nWe are seeking a Staff CAD\/EDA Tools Engineer to own the application layer of our EDA tool ecosystem: the wrapper scripts, CLI tooling, and container images that let engineers and AI systems run open-source and commercial chip design tools reliably and consistently. You will maintain and extend internal tooling running on the cloud at scale. If you like turning EDA tool quirks into clean, dependable software that other engineers and AI agents can build on, this role is for you.\n\n**Key Responsibilities**\n\n- Maintain and evolve wrapper scripts and CLI tooling that give a single, consistent interface across open-source EDA tools (Verilator, Yosys, slang, Icarus Verilog, cocotb) and commercial tools.\n- Build, harden, and version Docker images that package EDA tools with correct dependencies and licenses, and publish them for reliable use across the team.\n- Own the application layer of the EDA tool stack end-to-end: evaluate and integrate new open-source tools, and write the scripts and configuration that make them usable in real design and verification flows.\n- Diagnose and fix tool compatibility issues, version drift, and build breakages across simulators, synthesis tools, and container environments.\n- Support application-layer license configuration for commercial EDA tools (e.g., FlexLM-based license servers), partnering with DevOps, who own the underlying infrastructure.\n- Collaborate with DevOps on how containerized tools are deployed and consumed, while owning the container image content and correctness yourself.\n- Partner with RTL design, verification, and AI\/ML engineers to understand workflow needs and translate them into reliable, documented tooling.\n- Write clear documentation for tool usage, wrapper APIs, and container images so other engineers, and Cognichip's AI agents, can self-serve.\n\n**Required Qualifications**\n\n- Bachelor's degree in Computer Science, Electrical Engineering, or a closely related field.\n- 10+ years of experience in software\/tools engineering, and CAD\/EDA infrastructure.\n- Hands-on experience with open-source EDA\/HDL tools such as Verilator, Yosys, Icarus Verilog, or similar RTL simulation\/synthesis tools.\n- Strong scripting and software engineering skills in Python and Bash, including building CLI tools or wrappers around third-party software.\n- Solid working knowledge of Docker: writing Dockerfiles, building and versioning images, and troubleshooting containerized environments.\n- Familiarity with digital design EDA tools from Synopsys, Cadence and Siemens\n- Comfortable working in Linux environments and debugging tool, build, and dependency issues independently.\n\n**Preferred Qualifications**\n\n- Familiarity with hardware verification methodologies and frameworks (UVM, or similar).\n- Experience with declarative build\/dependency systems for hardware projects\n- Experience with FlexLM or other license-management systems for EDA tools.\n- Familiarity with cloud environments (AWS, GCP, or Azure) as a consumer of container images built for cloud deployment.\n- Startup or small-team experience owning a tooling area end-to-end with minimal hand-holding.\n\n**What It's Like Here**\n\nWe're a fast-moving AI startup with a collaborative, high-trust culture. We value technical excellence, ownership, and the freedom to experiment. Our best work happens when our builders and innovators work closely together to turn ambitious ideas into category defining products. We operate on a hybrid schedule with four days in office, one day remote. If you're excited to build cutting edge tools that empower semiconductor engineers and reshape how chips are designed, you'll feel right at home.","url":null,"created_at":"2026-08-11T23:02:12.000000Z","department":"Engineering","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nStaff CAD\/EDA Tools Engineer\n\n**About Cognichip**\n\nAt Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips. Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world's most complex engineering disciplines.\n\n**About the Role**\n\nWe are seeking a Staff CAD\/EDA Tools Engineer to own the application layer of our EDA tool ecosystem: the wrapper scripts, CLI tooling, and container images that let engineers and AI systems run open-source and commercial chip design tools reliably and consistently. You will maintain and extend internal tooling running on the cloud at scale. If you like turning EDA tool quirks into clean, dependable software that other engineers and AI agents can build on, this role is for you.\n\n**Key Responsibilities**\n\n- Maintain and evolve wrapper scripts and CLI tooling that give a single, consistent interface across open-source EDA tools (Verilator, Yosys, slang, Icarus Verilog, cocotb) and commercial tools.\n- Build, harden, and version Docker images that package EDA tools with correct dependencies and licenses, and publish them for reliable use across the team.\n- Own the application layer of the EDA tool stack end-to-end: evaluate and integrate new open-source tools, and write the scripts and configuration that make them usable in real design and verification flows.\n- Diagnose and fix tool compatibility issues, version drift, and build breakages across simulators, synthesis tools, and container environments.\n- Support application-layer license configuration for commercial EDA tools (e.g., FlexLM-based license servers), partnering with DevOps, who own the underlying infrastructure.\n- Collaborate with DevOps on how containerized tools are deployed and consumed, while owning the container image content and correctness yourself.\n- Partner with RTL design, verification, and AI\/ML engineers to understand workflow needs and translate them into reliable, documented tooling.\n- Write clear documentation for tool usage, wrapper APIs, and container images so other engineers, and Cognichip's AI agents, can self-serve.\n\n**Required Qualifications**\n\n- Bachelor's degree in Computer Science, Electrical Engineering, or a closely related field.\n- 10+ years of experience in software\/tools engineering, and CAD\/EDA infrastructure.\n- Hands-on experience with open-source EDA\/HDL tools such as Verilator, Yosys, Icarus Verilog, or similar RTL simulation\/synthesis tools.\n- Strong scripting and software engineering skills in Python and Bash, including building CLI tools or wrappers around third-party software.\n- Solid working knowledge of Docker: writing Dockerfiles, building and versioning images, and troubleshooting containerized environments.\n- Familiarity with digital design EDA tools from Synopsys, Cadence and Siemens\n- Comfortable working in Linux environments and debugging tool, build, and dependency issues independently.\n\n**Preferred Qualifications**\n\n- Familiarity with hardware verification methodologies and frameworks (UVM, or similar).\n- Experience with declarative build\/dependency systems for hardware projects\n- Experience with FlexLM or other license-management systems for EDA tools.\n- Familiarity with cloud environments (AWS, GCP, or Azure) as a consumer of container images built for cloud deployment.\n- Startup or small-team experience owning a tooling area end-to-end with minimal hand-holding.\n\n**What It's Like Here**\n\nWe're a fast-moving AI startup with a collaborative, high-trust culture. We value technical excellence, ownership, and the freedom to experiment. Our best work happens when our builders and innovators work closely together to turn ambitious ideas into category defining products. We operate on a hybrid schedule with four days in office, one day remote. If you're excited to build cutting edge tools that empower semiconductor engineers and reshape how chips are designed, you'll feel right at home.","categories":[],"employment_type":"FULL_TIME","experience_level":"MID_SENIOR_LEVEL","workplace_type":"Onsite","salary":{"min":155000,"max":185000,"currency":"USD","period":"YEARLY"}},{"uuid":"f4afd62e-ef75-4e27-8a69-618a39c37994","title":"Staff CAD\/EDA Tools Engineer","content":"**Job Title**\n\nStaff CAD\/EDA Tools Engineer\n\n**About Cognichip**\n\nAt Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips. Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world's most complex engineering disciplines.\n\n**About the Role**\n\nWe are seeking a Staff CAD\/EDA Tools Engineer to own the application layer of our EDA tool ecosystem: the wrapper scripts, CLI tooling, and container images that let engineers and AI systems run open-source and commercial chip design tools reliably and consistently. You will maintain and extend internal tooling running on the cloud at scale. If you like turning EDA tool quirks into clean, dependable software that other engineers and AI agents can build on, this role is for you.\n\n**Key Responsibilities**\n\n- Maintain and evolve wrapper scripts and CLI tooling that give a single, consistent interface across open-source EDA tools (Verilator, Yosys, slang, Icarus Verilog, cocotb) and commercial tools.\n- Build, harden, and version Docker images that package EDA tools with correct dependencies and licenses, and publish them for reliable use across the team.\n- Own the application layer of the EDA tool stack end-to-end: evaluate and integrate new open-source tools, and write the scripts and configuration that make them usable in real design and verification flows.\n- Diagnose and fix tool compatibility issues, version drift, and build breakages across simulators, synthesis tools, and container environments.\n- Support application-layer license configuration for commercial EDA tools (e.g., FlexLM-based license servers), partnering with DevOps, who own the underlying infrastructure.\n- Collaborate with DevOps on how containerized tools are deployed and consumed, while owning the container image content and correctness yourself.\n- Partner with RTL design, verification, and AI\/ML engineers to understand workflow needs and translate them into reliable, documented tooling.\n- Write clear documentation for tool usage, wrapper APIs, and container images so other engineers, and Cognichip's AI agents, can self-serve.\n\n**Required Qualifications**\n\n- Bachelor's degree in Computer Science, Electrical Engineering, or a closely related field.\n- 10+ years of experience in software\/tools engineering, and CAD\/EDA infrastructure.\n- Hands-on experience with open-source EDA\/HDL tools such as Verilator, Yosys, Icarus Verilog, or similar RTL simulation\/synthesis tools.\n- Strong scripting and software engineering skills in Python and Bash, including building CLI tools or wrappers around third-party software.\n- Solid working knowledge of Docker: writing Dockerfiles, building and versioning images, and troubleshooting containerized environments.\n- Familiarity with digital design EDA tools from Synopsys, Cadence and Siemens\n- Comfortable working in Linux environments and debugging tool, build, and dependency issues independently.\n\n**Preferred Qualifications**\n\n- Familiarity with hardware verification methodologies and frameworks (UVM, or similar).\n- Experience with declarative build\/dependency systems for hardware projects\n- Experience with FlexLM or other license-management systems for EDA tools.\n- Familiarity with cloud environments (AWS, GCP, or Azure) as a consumer of container images built for cloud deployment.\n- Startup or small-team experience owning a tooling area end-to-end with minimal hand-holding.\n\n**What It's Like Here**\n\nWe're a fast-moving AI startup with a collaborative, high-trust culture. We value technical excellence, ownership, and the freedom to experiment. Our best work happens when our builders and innovators work closely together to turn ambitious ideas into category defining products. We operate on a hybrid schedule with four days in office, one day remote. If you're excited to build cutting edge tools that empower semiconductor engineers and reshape how chips are designed, you'll feel right at home.","url":null,"created_at":"2026-08-11T23:02:12.000000Z","department":"Engineering","job_type":null,"location":"\ud83c\udde8\ud83c\udde6 Toronto","description":"**Job Title**\n\nStaff CAD\/EDA Tools Engineer\n\n**About Cognichip**\n\nAt Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips. Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world's most complex engineering disciplines.\n\n**About the Role**\n\nWe are seeking a Staff CAD\/EDA Tools Engineer to own the application layer of our EDA tool ecosystem: the wrapper scripts, CLI tooling, and container images that let engineers and AI systems run open-source and commercial chip design tools reliably and consistently. You will maintain and extend internal tooling running on the cloud at scale. If you like turning EDA tool quirks into clean, dependable software that other engineers and AI agents can build on, this role is for you.\n\n**Key Responsibilities**\n\n- Maintain and evolve wrapper scripts and CLI tooling that give a single, consistent interface across open-source EDA tools (Verilator, Yosys, slang, Icarus Verilog, cocotb) and commercial tools.\n- Build, harden, and version Docker images that package EDA tools with correct dependencies and licenses, and publish them for reliable use across the team.\n- Own the application layer of the EDA tool stack end-to-end: evaluate and integrate new open-source tools, and write the scripts and configuration that make them usable in real design and verification flows.\n- Diagnose and fix tool compatibility issues, version drift, and build breakages across simulators, synthesis tools, and container environments.\n- Support application-layer license configuration for commercial EDA tools (e.g., FlexLM-based license servers), partnering with DevOps, who own the underlying infrastructure.\n- Collaborate with DevOps on how containerized tools are deployed and consumed, while owning the container image content and correctness yourself.\n- Partner with RTL design, verification, and AI\/ML engineers to understand workflow needs and translate them into reliable, documented tooling.\n- Write clear documentation for tool usage, wrapper APIs, and container images so other engineers, and Cognichip's AI agents, can self-serve.\n\n**Required Qualifications**\n\n- Bachelor's degree in Computer Science, Electrical Engineering, or a closely related field.\n- 10+ years of experience in software\/tools engineering, and CAD\/EDA infrastructure.\n- Hands-on experience with open-source EDA\/HDL tools such as Verilator, Yosys, Icarus Verilog, or similar RTL simulation\/synthesis tools.\n- Strong scripting and software engineering skills in Python and Bash, including building CLI tools or wrappers around third-party software.\n- Solid working knowledge of Docker: writing Dockerfiles, building and versioning images, and troubleshooting containerized environments.\n- Familiarity with digital design EDA tools from Synopsys, Cadence and Siemens\n- Comfortable working in Linux environments and debugging tool, build, and dependency issues independently.\n\n**Preferred Qualifications**\n\n- Familiarity with hardware verification methodologies and frameworks (UVM, or similar).\n- Experience with declarative build\/dependency systems for hardware projects\n- Experience with FlexLM or other license-management systems for EDA tools.\n- Familiarity with cloud environments (AWS, GCP, or Azure) as a consumer of container images built for cloud deployment.\n- Startup or small-team experience owning a tooling area end-to-end with minimal hand-holding.\n\n**What It's Like Here**\n\nWe're a fast-moving AI startup with a collaborative, high-trust culture. We value technical excellence, ownership, and the freedom to experiment. Our best work happens when our builders and innovators work closely together to turn ambitious ideas into category defining products. We operate on a hybrid schedule with four days in office, one day remote. If you're excited to build cutting edge tools that empower semiconductor engineers and reshape how chips are designed, you'll feel right at home.","categories":[],"employment_type":"FULL_TIME","experience_level":"MID_SENIOR_LEVEL","workplace_type":"Onsite","salary":{"min":143000,"max":175000,"currency":"CAD","period":"YEARLY"}},{"uuid":"74ea70e7-ee6e-495a-8b0c-2211ebedc572","title":"Staff Backend Software Engineer","content":"**Job Title**\n\nStaff Backend Software Engineer\n\n**About Cognichip**\n\nAt Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips. Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world\u2019s most complex engineering disciplines.\n\n**About the Role**\n\nWe are seeking a Staff Backend Software Engineer to spearhead the development of our platform applications and services. You will architect critical backend solutions, including usage modeling, licensing for our AI products, and scalable services powering our agentic workflows. Your work will directly impact Cognichip\u2019s core product offerings for clients while building internal systems that empower our R&D, product, and sales teams.\n\n**Key Responsibilities**\n\n- Architect and build robust, scalable backend microservices within a cloud-native Kubernetes environment, ensuring high availability and performance.\n- Bridge the gap between backend services and UI requirements, delivering seamless full-stack capabilities where necessary.\n- Engineer automated CI\/CD workflows for efficient service deployment, container management, and image lifecycles.\n- Implement advanced observability, metrics, and alerting strategies to ensure reliability across multi-cluster environments.\n- Partner cross-functionally with IDE, Agentic, Evaluations teams to architect backend services that unlock new, high-impact product features.\n- Build internal platforms and tooling that empower research, sales, and solutions teams to operate with high velocity.\n- Champion engineering excellence by enforcing code quality standards, setting technical strategy, and maintaining architectural consistency across systems.\n- Serve as a technical authority for key systems, driving domain expertise and seamless integration within our broader ecosystem.\n\n**Required Qualifications**\n\n- 15+ years of software engineering experience, with at least 5+ years in technical leadership roles. For fewer years of experience, the role can be scoped to senior engineer with 5-10 years of relevant experience.\n- Proven track record architecting and scaling cloud-native SaaS platforms in fast-paced, high-growth environments.\n- Deep technical expertise in distributed systems, specifically microservices, databases, messaging queues, and caching strategies.\n- Demonstrated success in cross-functional product development, effectively bridging the gap between technical requirements and business objectives.\n- Exceptional communication and collaboration skills with a passion for mentoring and developing early-career engineers.\n\n**Bonus**\n\n- experience in AI\/ML infrastructure, developer productivity tools, or startup environments.\n\n**What It's Like Here**\n\n- We\u2019re a fast-moving AI startup with a collaborative, high-trust culture.\n- We value technical excellence, ownership, and the freedom to experiment.\n- Our best work happens when our builders and innovators work closely together to turn ambitious ideas into category defining products.\n- We operate on a hybrid schedule with four days in office, one day remote.\n- If you\u2019re excited to build cutting edge tools that empower semiconductor engineers and reshape how chips are designed, you\u2019ll feel right at home.","url":null,"created_at":"2026-08-11T23:52:14.000000Z","department":"Engineering","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nStaff Backend Software Engineer\n\n**About Cognichip**\n\nAt Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips. Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world\u2019s most complex engineering disciplines.\n\n**About the Role**\n\nWe are seeking a Staff Backend Software Engineer to spearhead the development of our platform applications and services. You will architect critical backend solutions, including usage modeling, licensing for our AI products, and scalable services powering our agentic workflows. Your work will directly impact Cognichip\u2019s core product offerings for clients while building internal systems that empower our R&D, product, and sales teams.\n\n**Key Responsibilities**\n\n- Architect and build robust, scalable backend microservices within a cloud-native Kubernetes environment, ensuring high availability and performance.\n- Bridge the gap between backend services and UI requirements, delivering seamless full-stack capabilities where necessary.\n- Engineer automated CI\/CD workflows for efficient service deployment, container management, and image lifecycles.\n- Implement advanced observability, metrics, and alerting strategies to ensure reliability across multi-cluster environments.\n- Partner cross-functionally with IDE, Agentic, Evaluations teams to architect backend services that unlock new, high-impact product features.\n- Build internal platforms and tooling that empower research, sales, and solutions teams to operate with high velocity.\n- Champion engineering excellence by enforcing code quality standards, setting technical strategy, and maintaining architectural consistency across systems.\n- Serve as a technical authority for key systems, driving domain expertise and seamless integration within our broader ecosystem.\n\n**Required Qualifications**\n\n- 15+ years of software engineering experience, with at least 5+ years in technical leadership roles. For fewer years of experience, the role can be scoped to senior engineer with 5-10 years of relevant experience.\n- Proven track record architecting and scaling cloud-native SaaS platforms in fast-paced, high-growth environments.\n- Deep technical expertise in distributed systems, specifically microservices, databases, messaging queues, and caching strategies.\n- Demonstrated success in cross-functional product development, effectively bridging the gap between technical requirements and business objectives.\n- Exceptional communication and collaboration skills with a passion for mentoring and developing early-career engineers.\n\n**Bonus**\n\n- experience in AI\/ML infrastructure, developer productivity tools, or startup environments.\n\n**What It's Like Here**\n\n- We\u2019re a fast-moving AI startup with a collaborative, high-trust culture.\n- We value technical excellence, ownership, and the freedom to experiment.\n- Our best work happens when our builders and innovators work closely together to turn ambitious ideas into category defining products.\n- We operate on a hybrid schedule with four days in office, one day remote.\n- If you\u2019re excited to build cutting edge tools that empower semiconductor engineers and reshape how chips are designed, you\u2019ll feel right at home.","categories":[],"employment_type":"FULL_TIME","experience_level":"MID_SENIOR_LEVEL","workplace_type":"Onsite","salary":{"min":195000,"max":230000,"currency":"USD","period":"YEARLY"}},{"uuid":"90a93324-328c-4024-8748-a1c03a1be45a","title":"Staff Backend Software Engineer","content":"**Job Title**\n\nStaff Backend Software Engineer\n\n**About Cognichip**\n\nAt Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips. Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world\u2019s most complex engineering disciplines.\n\n**About the Role**\n\nWe are seeking a Staff Backend Software Engineer to spearhead the development of our platform applications and services. You will architect critical backend solutions, including usage modeling, licensing for our AI products, and scalable services powering our agentic workflows. Your work will directly impact Cognichip\u2019s core product offerings for clients while building internal systems that empower our R&D, product, and sales teams.\n\n**Key Responsibilities**\n\n- Architect and build robust, scalable backend microservices within a cloud-native Kubernetes environment, ensuring high availability and performance.\n- Bridge the gap between backend services and UI requirements, delivering seamless full-stack capabilities where necessary.\n- Engineer automated CI\/CD workflows for efficient service deployment, container management, and image lifecycles.\n- Implement advanced observability, metrics, and alerting strategies to ensure reliability across multi-cluster environments.\n- Partner cross-functionally with IDE, Agentic, Evaluations teams to architect backend services that unlock new, high-impact product features.\n- Build internal platforms and tooling that empower research, sales, and solutions teams to operate with high velocity.\n- Champion engineering excellence by enforcing code quality standards, setting technical strategy, and maintaining architectural consistency across systems.\n- Serve as a technical authority for key systems, driving domain expertise and seamless integration within our broader ecosystem.\n\n**Required Qualifications**\n\n- 15+ years of software engineering experience, with at least 5+ years in technical leadership roles. For fewer years of experience, the role can be scoped to senior engineer with 5-10 years of relevant experience.\n- Proven track record architecting and scaling cloud-native SaaS platforms in fast-paced, high-growth environments.\n- Deep technical expertise in distributed systems, specifically microservices, databases, messaging queues, and caching strategies.\n- Demonstrated success in cross-functional product development, effectively bridging the gap between technical requirements and business objectives.\n- Exceptional communication and collaboration skills with a passion for mentoring and developing early-career engineers.\n\n**Bonus**\n\n- experience in AI\/ML infrastructure, developer productivity tools, or startup environments.\n\n**What It's Like Here**\n\n- We\u2019re a fast-moving AI startup with a collaborative, high-trust culture.\n- We value technical excellence, ownership, and the freedom to experiment.\n- Our best work happens when our builders and innovators work closely together to turn ambitious ideas into category defining products.\n- We operate on a hybrid schedule with four days in office, one day remote.\n- If you\u2019re excited to build cutting edge tools that empower semiconductor engineers and reshape how chips are designed, you\u2019ll feel right at home.","url":null,"created_at":"2026-08-11T23:52:14.000000Z","department":"Engineering","job_type":null,"location":"\ud83c\udde8\ud83c\udde6 Toronto","description":"**Job Title**\n\nStaff Backend Software Engineer\n\n**About Cognichip**\n\nAt Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips. Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world\u2019s most complex engineering disciplines.\n\n**About the Role**\n\nWe are seeking a Staff Backend Software Engineer to spearhead the development of our platform applications and services. You will architect critical backend solutions, including usage modeling, licensing for our AI products, and scalable services powering our agentic workflows. Your work will directly impact Cognichip\u2019s core product offerings for clients while building internal systems that empower our R&D, product, and sales teams.\n\n**Key Responsibilities**\n\n- Architect and build robust, scalable backend microservices within a cloud-native Kubernetes environment, ensuring high availability and performance.\n- Bridge the gap between backend services and UI requirements, delivering seamless full-stack capabilities where necessary.\n- Engineer automated CI\/CD workflows for efficient service deployment, container management, and image lifecycles.\n- Implement advanced observability, metrics, and alerting strategies to ensure reliability across multi-cluster environments.\n- Partner cross-functionally with IDE, Agentic, Evaluations teams to architect backend services that unlock new, high-impact product features.\n- Build internal platforms and tooling that empower research, sales, and solutions teams to operate with high velocity.\n- Champion engineering excellence by enforcing code quality standards, setting technical strategy, and maintaining architectural consistency across systems.\n- Serve as a technical authority for key systems, driving domain expertise and seamless integration within our broader ecosystem.\n\n**Required Qualifications**\n\n- 15+ years of software engineering experience, with at least 5+ years in technical leadership roles. For fewer years of experience, the role can be scoped to senior engineer with 5-10 years of relevant experience.\n- Proven track record architecting and scaling cloud-native SaaS platforms in fast-paced, high-growth environments.\n- Deep technical expertise in distributed systems, specifically microservices, databases, messaging queues, and caching strategies.\n- Demonstrated success in cross-functional product development, effectively bridging the gap between technical requirements and business objectives.\n- Exceptional communication and collaboration skills with a passion for mentoring and developing early-career engineers.\n\n**Bonus**\n\n- experience in AI\/ML infrastructure, developer productivity tools, or startup environments.\n\n**What It's Like Here**\n\n- We\u2019re a fast-moving AI startup with a collaborative, high-trust culture.\n- We value technical excellence, ownership, and the freedom to experiment.\n- Our best work happens when our builders and innovators work closely together to turn ambitious ideas into category defining products.\n- We operate on a hybrid schedule with four days in office, one day remote.\n- If you\u2019re excited to build cutting edge tools that empower semiconductor engineers and reshape how chips are designed, you\u2019ll feel right at home.","categories":[],"employment_type":"FULL_TIME","experience_level":"MID_SENIOR_LEVEL","workplace_type":"Onsite","salary":{"min":184000,"max":225000,"currency":"CAD","period":"YEARLY"}},{"uuid":"0874d0e1-e759-4df5-af6b-8e2408d0aea3","title":"Senior Data Scientist, AI Training Data","content":"**Job Title**\n\nSenior Data Scientist, AI Training Data\n\n**About Cognichip**\n\nWe build AI-native tools for semiconductor engineering, combining large proprietary models, agentic workflows, and domain-specific intelligence to help engineers design, verify, and optimize chips faster.\n\n**About the Role**\n\nWe're looking for a Senior Data Scientist to own the data our models learn from. Semiconductor engineering data is specialized, scarce, and often tightly licensed \u2014 very different from the general text and code used to train most large models. Turning it into training-ready, evaluation-ready datasets is one of the highest-leverage inputs to our model quality. In this role, you'll design the curation, synthetic data generation, and quality-modeling work that turns raw technical material into usable datasets, running at scale on our internal data infrastructure (managed by a dedicated platform team, so you can focus on the data itself). You'll work closely with domain engineers to figure out what the models actually need, and with our AI team to connect dataset improvements to measurable model performance gains.\n\n**Key Responsibilities**\n\n- Curate licensed and open-source technical datasets \u2014 collection, cleaning, annotation, and integration across the engineering lifecycle\n- Build automated pipelines for sourcing, license classification, and normalization of public data\n- Design synthetic and augmented data generation workflows to keep pace with model training demand\n- Develop quality-modeling approaches: deduplication, contamination\/leakage detection, license and PII screening, difficulty\/diversity scoring, and dataset-to-eval attribution\n- Write large-scale distributed data processing jobs, partnering with a platform team on infrastructure needs (throughput, versioning, lineage, reproducibility)\n- Translate observed model weaknesses and feedback into targeted, well-sourced datasets\n- Build and maintain retrieval\/embedding datasets that support product features\n- Run exploratory analysis and produce insights that guide modeling, product, and go-to-market decisions\n- Collaborate across engineering, AI research, product, and business teams to turn ambiguous needs into concrete datasets\n- Establish data governance practices: license provenance, documentation, retention, and compliance\n\n**Required Qualifications**\n\n- MS or PhD in Computer Science, Data Science, Statistics, or related field\n- 5\u201310 years of hands-on experience in data science or ML data work, with ownership of production datasets used by other teams\n- Expert Python and strong SQL, with experience processing large datasets using distributed computing frameworks (e.g., Spark)\n- Practical experience preparing text or code corpora for LLM training, fine-tuning, or evaluation\n- Solid applied statistics and ML foundations, with experience in a major ML framework (PyTorch, TensorFlow, or scikit-learn)\n- Familiarity with modern data orchestration and versioned storage systems\n- Working knowledge of data governance practices \u2014 licensing, provenance tracking, handling of confidential\/contractual data\n- Strong ability to work with domain experts and convert ambiguous requests into delivered datasets\n\n**Preferred Qualifications**\n\nThe following items are not required but are great bonuses:\n\n- Exposure to hardware or engineering domain data (e.g., specialized design\/verification formats and workflows). You don't need deep prior expertise \u2014 just genuine interest in learning a technical domain deeply\n- Experience building retrieval systems: chunking strategies for technical documents, embedding models, vector databases, and evaluation of retrieval-augmented systems\n- Experience with synthetic data generation using LLMs, including agentic pipelines built with modern orchestration frameworks\n- Familiarity with annotation tooling and workflows for expert-labeled data, including inter-annotator agreement and active learning\n- Contributions to open-source data, hardware, or AI projects; or published research in data-centric AI, dataset curation, or code models\n- Prior experience at a startup or early-stage team where you helped define a data function rather than inherited an existing one\n\n**What It\u2019s Like Here**\n\n- We\u2019re a fast-moving AI startup with a collaborative, high-trust culture\n- We value technical excellence, ownership, and the freedom to experiment\n- Our best work happens when our builders and innovators work closely together to turn ambitious ideas into category defining products\n- We operate on a hybrid schedule with four days in office, one day remote\n- If you\u2019re excited to build cutting edge tools that empower semiconductor engineers and reshape how chips are designed, you\u2019ll feel right at home","url":null,"created_at":"2026-08-20T19:05:41.000000Z","department":"Engineering","job_type":null,"location":"\ud83c\uddfa\ud83c\uddf8 Redwood City","description":"**Job Title**\n\nSenior Data Scientist, AI Training Data\n\n**About Cognichip**\n\nWe build AI-native tools for semiconductor engineering, combining large proprietary models, agentic workflows, and domain-specific intelligence to help engineers design, verify, and optimize chips faster.\n\n**About the Role**\n\nWe're looking for a Senior Data Scientist to own the data our models learn from. Semiconductor engineering data is specialized, scarce, and often tightly licensed \u2014 very different from the general text and code used to train most large models. Turning it into training-ready, evaluation-ready datasets is one of the highest-leverage inputs to our model quality. In this role, you'll design the curation, synthetic data generation, and quality-modeling work that turns raw technical material into usable datasets, running at scale on our internal data infrastructure (managed by a dedicated platform team, so you can focus on the data itself). You'll work closely with domain engineers to figure out what the models actually need, and with our AI team to connect dataset improvements to measurable model performance gains.\n\n**Key Responsibilities**\n\n- Curate licensed and open-source technical datasets \u2014 collection, cleaning, annotation, and integration across the engineering lifecycle\n- Build automated pipelines for sourcing, license classification, and normalization of public data\n- Design synthetic and augmented data generation workflows to keep pace with model training demand\n- Develop quality-modeling approaches: deduplication, contamination\/leakage detection, license and PII screening, difficulty\/diversity scoring, and dataset-to-eval attribution\n- Write large-scale distributed data processing jobs, partnering with a platform team on infrastructure needs (throughput, versioning, lineage, reproducibility)\n- Translate observed model weaknesses and feedback into targeted, well-sourced datasets\n- Build and maintain retrieval\/embedding datasets that support product features\n- Run exploratory analysis and produce insights that guide modeling, product, and go-to-market decisions\n- Collaborate across engineering, AI research, product, and business teams to turn ambiguous needs into concrete datasets\n- Establish data governance practices: license provenance, documentation, retention, and compliance\n\n**Required Qualifications**\n\n- MS or PhD in Computer Science, Data Science, Statistics, or related field\n- 5\u201310 years of hands-on experience in data science or ML data work, with ownership of production datasets used by other teams\n- Expert Python and strong SQL, with experience processing large datasets using distributed computing frameworks (e.g., Spark)\n- Practical experience preparing text or code corpora for LLM training, fine-tuning, or evaluation\n- Solid applied statistics and ML foundations, with experience in a major ML framework (PyTorch, TensorFlow, or scikit-learn)\n- Familiarity with modern data orchestration and versioned storage systems\n- Working knowledge of data governance practices \u2014 licensing, provenance tracking, handling of confidential\/contractual data\n- Strong ability to work with domain experts and convert ambiguous requests into delivered datasets\n\n**Preferred Qualifications**\n\nThe following items are not required but are great bonuses:\n\n- Exposure to hardware or engineering domain data (e.g., specialized design\/verification formats and workflows). You don't need deep prior expertise \u2014 just genuine interest in learning a technical domain deeply\n- Experience building retrieval systems: chunking strategies for technical documents, embedding models, vector databases, and evaluation of retrieval-augmented systems\n- Experience with synthetic data generation using LLMs, including agentic pipelines built with modern orchestration frameworks\n- Familiarity with annotation tooling and workflows for expert-labeled data, including inter-annotator agreement and active learning\n- Contributions to open-source data, hardware, or AI projects; or published research in data-centric AI, dataset curation, or code models\n- Prior experience at a startup or early-stage team where you helped define a data function rather than inherited an existing one\n\n**What It\u2019s Like Here**\n\n- We\u2019re a fast-moving AI startup with a collaborative, high-trust culture\n- We value technical excellence, ownership, and the freedom to experiment\n- Our best work happens when our builders and innovators work closely together to turn ambitious ideas into category defining products\n- We operate on a hybrid schedule with four days in office, one day remote\n- If you\u2019re excited to build cutting edge tools that empower semiconductor engineers and reshape how chips are designed, you\u2019ll feel right at home","categories":[],"employment_type":"FULL_TIME","experience_level":"MID_SENIOR_LEVEL","workplace_type":"Hybrid","salary":{"min":160000,"max":190000,"currency":"USD","period":"YEARLY"}}],"categories":["Engineering","R&D","Product & Marketing","Sales & Field"],"locations":["\ud83c\udde8\ud83c\udde6 Toronto","\ud83c\uddfa\ud83c\uddf8 Redwood City"],"settings":{"filterLocation":"on","filterCategory":"on","filterWorkplace":"on","filterEmployment":"off","groupByLocation":"off","groupByDepartment":"off","bestMatch":"on"}}}